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VX512] Only look at lower bit in constant scalar masks
for scalar masked instructions only the lower bit of the mask is relevant. so for constant masks we should either do an unmasked operation or no operation, depending on the value of the lower bit. This patch handles cases where the lower bit is '1'. Differential Revision: https://reviews.llvm.org/D32805 llvm-svn: 302546
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@ -19021,8 +19021,10 @@ static SDValue getScalarMaskingNode(SDValue Op, SDValue Mask,
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SDValue PreservedSrc,
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const X86Subtarget &Subtarget,
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SelectionDAG &DAG) {
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if (isAllOnesConstant(Mask))
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return Op;
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if (auto *MaskConst = dyn_cast<ConstantSDNode>(Mask))
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if (MaskConst->getZExtValue() & 0x1)
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return Op;
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MVT VT = Op.getSimpleValueType();
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SDLoc dl(Op);
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@ -26,6 +26,7 @@ define <4 x float>@test_var_maskz(<4 x float> %v0, <4 x float> %v1, <4 x float>
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ret < 4 x float> %res
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}
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; FIXME: we should just return %xmm0 here.
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define <4 x float>@test_const0_mask(<4 x float> %v0, <4 x float> %v1, <4 x float> %v2) {
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; CHECK-LABEL: test_const0_mask:
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; CHECK: ## BB#0:
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@ -36,6 +37,7 @@ define <4 x float>@test_const0_mask(<4 x float> %v0, <4 x float> %v1, <4 x float
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ret < 4 x float> %res
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}
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; FIXME: we should zero the lower element of xmm0 and return it.
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define <4 x float>@test_const0_maskz(<4 x float> %v0, <4 x float> %v1, <4 x float> %v2) {
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; CHECK-LABEL: test_const0_maskz:
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; CHECK: ## BB#0:
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@ -46,6 +48,7 @@ define <4 x float>@test_const0_maskz(<4 x float> %v0, <4 x float> %v1, <4 x floa
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ret < 4 x float> %res
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}
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; FIXME: we should just return %xmm0 here.
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define <4 x float>@test_const2_mask(<4 x float> %v0, <4 x float> %v1, <4 x float> %v2) {
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; CHECK-LABEL: test_const2_mask:
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; CHECK: ## BB#0:
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@ -56,6 +59,7 @@ define <4 x float>@test_const2_mask(<4 x float> %v0, <4 x float> %v1, <4 x float
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ret < 4 x float> %res
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}
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; FIXME: we should zero the lower element of xmm0 and return it.
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define <4 x float>@test_const2_maskz(<4 x float> %v0, <4 x float> %v1, <4 x float> %v2) {
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; CHECK-LABEL: test_const2_maskz:
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; CHECK: ## BB#0:
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@ -87,9 +91,7 @@ define <4 x float>@test_const_allone_maskz(<4 x float> %v0, <4 x float> %v1, <4
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define <4 x float>@test_const_3_mask(<4 x float> %v0, <4 x float> %v1, <4 x float> %v2) {
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; CHECK-LABEL: test_const_3_mask:
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; CHECK: ## BB#0:
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; CHECK-NEXT: kxnorw %k0, %k0, %k0
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; CHECK-NEXT: kshiftrw $15, %k0, %k1
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; CHECK-NEXT: vfmadd213ss %xmm2, %xmm1, %xmm0 {%k1}
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; CHECK-NEXT: vfmadd213ss %xmm2, %xmm1, %xmm0
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; CHECK-NEXT: retq
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%res = call <4 x float> @llvm.x86.avx512.mask.vfmadd.ss(<4 x float> %v0,<4 x float> %v1, <4 x float> %v2, i8 3, i32 4)
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ret < 4 x float> %res
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@ -98,9 +100,7 @@ define <4 x float>@test_const_3_mask(<4 x float> %v0, <4 x float> %v1, <4 x floa
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define <4 x float>@test_const_3_maskz(<4 x float> %v0, <4 x float> %v1, <4 x float> %v2) {
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; CHECK-LABEL: test_const_3_maskz:
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; CHECK: ## BB#0:
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; CHECK-NEXT: kxnorw %k0, %k0, %k0
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; CHECK-NEXT: kshiftrw $15, %k0, %k1
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; CHECK-NEXT: vfmadd213ss %xmm2, %xmm1, %xmm0 {%k1} {z}
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; CHECK-NEXT: vfmadd213ss %xmm2, %xmm1, %xmm0
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; CHECK-NEXT: retq
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%res = call <4 x float> @llvm.x86.avx512.maskz.vfmadd.ss(<4 x float> %v0,<4 x float> %v1, <4 x float> %v2, i8 3, i32 4)
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ret < 4 x float> %res
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