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[x86] Refactor the tests for popcnt.
Extracted from the D6531 patch by Bruno Cardoso Lopes, and re-generated to reflect the current state of the world. This should let Bruno's D6531 actually show the delta between the approaches by running the x86 test case update script after re-building. llvm-svn: 238391
This commit is contained in:
Chandler Carruth
parent
4193c5f761
commit
521fdf1acb
1840
test/CodeGen/X86/avx-popcnt.ll
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1840
test/CodeGen/X86/avx-popcnt.ll
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1062
test/CodeGen/X86/avx2-popcnt.ll
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1062
test/CodeGen/X86/avx2-popcnt.ll
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@ -1,159 +0,0 @@
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=avx2 | FileCheck -check-prefix=AVX2 %s
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=avx -mattr=-popcnt | FileCheck -check-prefix=AVX1-NOPOPCNT %s
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=avx2 -mattr=-popcnt | FileCheck -check-prefix=AVX2-NOPOPCNT %s
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; Vector version of:
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; v = v - ((v >> 1) & 0x55555555)
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; v = (v & 0x33333333) + ((v >> 2) & 0x33333333)
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; v = (v + (v >> 4) & 0xF0F0F0F)
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; v = v + (v >> 8)
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; v = v + (v >> 16)
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; v = v + (v >> 32) ; i64 only
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define <8 x i32> @test0(<8 x i32> %x) {
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; AVX2-LABEL: @test0
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entry:
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; AVX2: vpsrld $1, %ymm
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; AVX2-NEXT: vpbroadcastd
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; AVX2-NEXT: vpand
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; AVX2-NEXT: vpsubd
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; AVX2-NEXT: vpbroadcastd
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; AVX2-NEXT: vpand
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; AVX2-NEXT: vpsrld $2
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; AVX2-NEXT: vpand
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; AVX2-NEXT: vpaddd
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; AVX2-NEXT: vpsrld $4
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; AVX2-NEXT: vpaddd
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; AVX2-NEXT: vpbroadcastd
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; AVX2-NEXT: vpand
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; AVX2-NEXT: vpsrld $8
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; AVX2-NEXT: vpaddd
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; AVX2-NEXT: vpsrld $16
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; AVX2-NEXT: vpaddd
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; AVX2-NEXT: vpbroadcastd
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; AVX2-NEXT: vpand
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%y = call <8 x i32> @llvm.ctpop.v8i32(<8 x i32> %x)
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ret <8 x i32> %y
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}
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define <4 x i64> @test1(<4 x i64> %x) {
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; AVX2-NOPOPCNT-LABEL: @test1
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entry:
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; AVX2-NOPOPCNT: vpsrlq $1, %ymm
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; AVX2-NOPOPCNT-NEXT: vpbroadcastq
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; AVX2-NOPOPCNT-NEXT: vpand
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; AVX2-NOPOPCNT-NEXT: vpsubq
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; AVX2-NOPOPCNT-NEXT: vpbroadcastq
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; AVX2-NOPOPCNT-NEXT: vpand
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; AVX2-NOPOPCNT-NEXT: vpsrlq $2
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; AVX2-NOPOPCNT-NEXT: vpand
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; AVX2-NOPOPCNT-NEXT: vpaddq
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; AVX2-NOPOPCNT-NEXT: vpsrlq $4
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; AVX2-NOPOPCNT-NEXT: vpaddq
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; AVX2-NOPOPCNT-NEXT: vpbroadcastq
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; AVX2-NOPOPCNT-NEXT: vpand
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; AVX2-NOPOPCNT-NEXT: vpsrlq $8
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; AVX2-NOPOPCNT-NEXT: vpaddq
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; AVX2-NOPOPCNT-NEXT: vpsrlq $16
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; AVX2-NOPOPCNT-NEXT: vpaddq
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; AVX2-NOPOPCNT-NEXT: vpsrlq $32
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; AVX2-NOPOPCNT-NEXT: vpaddq
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; AVX2-NOPOPCNT-NEXT: vpbroadcastq
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; AVX2-NOPOPCNT-NEXT: vpand
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%y = call <4 x i64> @llvm.ctpop.v4i64(<4 x i64> %x)
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ret <4 x i64> %y
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}
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define <4 x i32> @test2(<4 x i32> %x) {
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; AVX2-NOPOPCNT-LABEL: @test2
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; AVX1-NOPOPCNT-LABEL: @test2
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entry:
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; AVX2-NOPOPCNT: vpsrld $1, %xmm
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; AVX2-NOPOPCNT-NEXT: vpbroadcastd
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; AVX2-NOPOPCNT-NEXT: vpand
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; AVX2-NOPOPCNT-NEXT: vpsubd
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; AVX2-NOPOPCNT-NEXT: vpbroadcastd
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; AVX2-NOPOPCNT-NEXT: vpand
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; AVX2-NOPOPCNT-NEXT: vpsrld $2
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; AVX2-NOPOPCNT-NEXT: vpand
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; AVX2-NOPOPCNT-NEXT: vpaddd
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; AVX2-NOPOPCNT-NEXT: vpsrld $4
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; AVX2-NOPOPCNT-NEXT: vpaddd
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; AVX2-NOPOPCNT-NEXT: vpbroadcastd
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; AVX2-NOPOPCNT-NEXT: vpand
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; AVX2-NOPOPCNT-NEXT: vpsrld $8
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; AVX2-NOPOPCNT-NEXT: vpaddd
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; AVX2-NOPOPCNT-NEXT: vpsrld $16
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; AVX2-NOPOPCNT-NEXT: vpaddd
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; AVX2-NOPOPCNT-NEXT: vpbroadcastd
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; AVX2-NOPOPCNT-NEXT: vpand
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; AVX1-NOPOPCNT: vpsrld $1, %xmm
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; AVX1-NOPOPCNT-NEXT: vpand
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; AVX1-NOPOPCNT-NEXT: vpsubd
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; AVX1-NOPOPCNT-NEXT: vmovdqa
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; AVX1-NOPOPCNT-NEXT: vpand
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; AVX1-NOPOPCNT-NEXT: vpsrld $2
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; AVX1-NOPOPCNT-NEXT: vpand
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; AVX1-NOPOPCNT-NEXT: vpaddd
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; AVX1-NOPOPCNT-NEXT: vpsrld $4
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; AVX1-NOPOPCNT-NEXT: vpaddd
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; AVX1-NOPOPCNT-NEXT: vpand
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; AVX1-NOPOPCNT-NEXT: vpsrld $8
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; AVX1-NOPOPCNT-NEXT: vpaddd
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; AVX1-NOPOPCNT-NEXT: vpsrld $16
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; AVX1-NOPOPCNT-NEXT: vpaddd
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; AVX1-NOPOPCNT-NEXT: vpand
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%y = call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %x)
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ret <4 x i32> %y
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}
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define <2 x i64> @test3(<2 x i64> %x) {
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; AVX2-NOPOPCNT-LABEL: @test3
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; AVX1-NOPOPCNT-LABEL: @test3
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entry:
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; AVX2-NOPOPCNT: vpsrlq $1, %xmm
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; AVX2-NOPOPCNT-NEXT: vpand
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; AVX2-NOPOPCNT-NEXT: vpsubq
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; AVX2-NOPOPCNT-NEXT: vmovdqa
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; AVX2-NOPOPCNT-NEXT: vpand
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; AVX2-NOPOPCNT-NEXT: vpsrlq $2
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; AVX2-NOPOPCNT-NEXT: vpand
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; AVX2-NOPOPCNT-NEXT: vpaddq
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; AVX2-NOPOPCNT-NEXT: vpsrlq $4
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; AVX2-NOPOPCNT-NEXT: vpaddq
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; AVX2-NOPOPCNT-NEXT: vpand
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; AVX2-NOPOPCNT-NEXT: vpsrlq $8
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; AVX2-NOPOPCNT-NEXT: vpaddq
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; AVX2-NOPOPCNT-NEXT: vpsrlq $16
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; AVX2-NOPOPCNT-NEXT: vpaddq
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; AVX2-NOPOPCNT-NEXT: vpsrlq $32
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; AVX2-NOPOPCNT-NEXT: vpaddq
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; AVX2-NOPOPCNT-NEXT: vpand
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; AVX1-NOPOPCNT: vpsrlq $1, %xmm
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; AVX1-NOPOPCNT-NEXT: vpand
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; AVX1-NOPOPCNT-NEXT: vpsubq
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; AVX1-NOPOPCNT-NEXT: vmovdqa
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; AVX1-NOPOPCNT-NEXT: vpand
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; AVX1-NOPOPCNT-NEXT: vpsrlq $2
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; AVX1-NOPOPCNT-NEXT: vpand
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; AVX1-NOPOPCNT-NEXT: vpaddq
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; AVX1-NOPOPCNT-NEXT: vpsrlq $4
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; AVX1-NOPOPCNT-NEXT: vpaddq
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; AVX1-NOPOPCNT-NEXT: vpand
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; AVX1-NOPOPCNT-NEXT: vpsrlq $8
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; AVX1-NOPOPCNT-NEXT: vpaddq
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; AVX1-NOPOPCNT-NEXT: vpsrlq $16
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; AVX1-NOPOPCNT-NEXT: vpaddq
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; AVX1-NOPOPCNT-NEXT: vpsrlq $32
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; AVX1-NOPOPCNT-NEXT: vpaddq
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; AVX1-NOPOPCNT-NEXT: vpand
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%y = call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %x)
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ret <2 x i64> %y
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}
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declare <4 x i32> @llvm.ctpop.v4i32(<4 x i32>)
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declare <2 x i64> @llvm.ctpop.v2i64(<2 x i64>)
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declare <8 x i32> @llvm.ctpop.v8i32(<8 x i32>)
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declare <4 x i64> @llvm.ctpop.v4i64(<4 x i64>)
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