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AArch64: fix conversion of 'J' inline asm constraints.
'J' represents a negative number suitable for an add/sub alias instruction, but while preparing it to become an int64_t we were mangling the sign extension. So "i32 -1" became 0xffffffffLL, for example. Should fix one half of PR20456. llvm-svn: 214052
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@ -4013,8 +4013,10 @@ void AArch64TargetLowering::LowerAsmOperandForConstraint(
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return;
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case 'J': {
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uint64_t NVal = -C->getSExtValue();
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if (isUInt<12>(NVal) || isShiftedUInt<12, 12>(NVal))
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if (isUInt<12>(NVal) || isShiftedUInt<12, 12>(NVal)) {
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CVal = C->getSExtValue();
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break;
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}
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return;
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}
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// The K and L constraints apply *only* to logical immediates, including
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@ -87,13 +87,17 @@ entry:
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ret i32 %1
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}
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define i32 @constraint_J(i32 %i, i32 %j) nounwind {
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define i32 @constraint_J(i32 %i, i32 %j, i64 %k) nounwind {
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entry:
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; CHECK-LABEL: constraint_J:
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%0 = tail call i32 asm sideeffect "sub ${0:w}, ${1:w}, $2", "=r,r,J"(i32 %i, i32 -16773120) nounwind
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; CHECK: sub {{w[0-9]+}}, {{w[0-9]+}}, #4278194176
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; CHECK: sub {{w[0-9]+}}, {{w[0-9]+}}, #-16773120
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%1 = tail call i32 asm sideeffect "sub ${0:w}, ${1:w}, $2", "=r,r,J"(i32 %i, i32 -1) nounwind
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; CHECK: sub {{w[0-9]+}}, {{w[0-9]+}}, #4294967295
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; CHECK: sub {{w[0-9]+}}, {{w[0-9]+}}, #-1
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%2 = tail call i64 asm sideeffect "sub ${0:x}, ${1:x}, $2", "=r,r,J"(i64 %k, i32 -1) nounwind
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; CHECK: sub {{x[0-9]+}}, {{x[0-9]+}}, #-1
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%3 = tail call i64 asm sideeffect "sub ${0:x}, ${1:x}, $2", "=r,r,J"(i64 %k, i64 -1) nounwind
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; CHECK: sub {{x[0-9]+}}, {{x[0-9]+}}, #-1
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ret i32 %1
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}
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