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[X86] Remove 256-bit and 512-bit memop pattern fragments. They are no longer used.
llvm-svn: 228563
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@ -457,18 +457,6 @@ def memopv4f32 : PatFrag<(ops node:$ptr), (v4f32 (memop node:$ptr))>;
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def memopv2f64 : PatFrag<(ops node:$ptr), (v2f64 (memop node:$ptr))>;
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def memopv2i64 : PatFrag<(ops node:$ptr), (v2i64 (memop node:$ptr))>;
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// 256-bit memop pattern fragments
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// NOTE: all 256-bit integer vector loads are promoted to v4i64
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def memopv8f32 : PatFrag<(ops node:$ptr), (v8f32 (memop node:$ptr))>;
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def memopv4f64 : PatFrag<(ops node:$ptr), (v4f64 (memop node:$ptr))>;
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def memopv4i64 : PatFrag<(ops node:$ptr), (v4i64 (memop node:$ptr))>;
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// 512-bit memop pattern fragments
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def memopv16f32 : PatFrag<(ops node:$ptr), (v16f32 (memop node:$ptr))>;
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def memopv8f64 : PatFrag<(ops node:$ptr), (v8f64 (memop node:$ptr))>;
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def memopv16i32 : PatFrag<(ops node:$ptr), (v16i32 (memop node:$ptr))>;
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def memopv8i64 : PatFrag<(ops node:$ptr), (v8i64 (memop node:$ptr))>;
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// SSSE3 uses MMX registers for some instructions. They aren't aligned on a
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// 16-byte boundary.
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// FIXME: 8 byte alignment for mmx reads is not required
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@ -2874,11 +2874,11 @@ defm PANDN : PDI_binop_all<0xDF, "pandn", X86andnp, v2i64, v4i64,
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multiclass sse12_fp_packed_scalar_logical_alias<
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bits<8> opc, string OpcodeStr, SDNode OpNode, OpndItins itins> {
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defm V#NAME#PS : sse12_fp_packed<opc, !strconcat(OpcodeStr, "ps"), OpNode,
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FR32, f32, f128mem, memopfsf32, SSEPackedSingle, itins, 0>,
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FR32, f32, f128mem, loadf32, SSEPackedSingle, itins, 0>,
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PS, VEX_4V;
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defm V#NAME#PD : sse12_fp_packed<opc, !strconcat(OpcodeStr, "pd"), OpNode,
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FR64, f64, f128mem, memopfsf64, SSEPackedDouble, itins, 0>,
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FR64, f64, f128mem, loadf64, SSEPackedDouble, itins, 0>,
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PD, VEX_4V;
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let Constraints = "$src1 = $dst" in {
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