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CMake: Make most target symbols hidden by default
Summary: For builds with LLVM_BUILD_LLVM_DYLIB=ON and BUILD_SHARED_LIBS=OFF this change makes all symbols in the target specific libraries hidden by default. A new macro called LLVM_EXTERNAL_VISIBILITY has been added to mark symbols in these libraries public, which is mainly needed for the definitions of the LLVMInitialize* functions. This patch reduces the number of public symbols in libLLVM.so by about 25%. This should improve load times for the dynamic library and also make abi checker tools, like abidiff require less memory when analyzing libLLVM.so One side-effect of this change is that for builds with LLVM_BUILD_LLVM_DYLIB=ON and LLVM_LINK_LLVM_DYLIB=ON some unittests that access symbols that are no longer public will need to be statically linked. Before and after public symbol counts (using gcc 8.2.1, ld.bfd 2.31.1): nm before/libLLVM-9svn.so | grep ' [A-Zuvw] ' | wc -l 36221 nm after/libLLVM-9svn.so | grep ' [A-Zuvw] ' | wc -l 26278 Reviewers: chandlerc, beanz, mgorny, rnk, hans Reviewed By: rnk, hans Subscribers: Jim, hiraditya, michaelplatings, chapuni, jholewinski, arsenm, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, nhaehnle, javed.absar, sbc100, jgravelle-google, aheejin, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, zzheng, edward-jones, mgrang, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, kristina, jsji, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D54439 llvm-svn: 362990
This commit is contained in:
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@ -100,11 +100,17 @@
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/// not accessible from outside it. Can also be used to mark variables and
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/// functions, making them private to any shared library they are linked into.
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/// On PE/COFF targets, library visibility is the default, so this isn't needed.
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///
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/// LLVM_EXTERNAL_VISIBILITY - classes, functions, and variables marked with this
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/// attribute will be made public and visible outside of any shared library they
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/// are linked in to.
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#if (__has_attribute(visibility) || LLVM_GNUC_PREREQ(4, 0, 0)) && \
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!defined(__MINGW32__) && !defined(__CYGWIN__) && !defined(_WIN32)
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#define LLVM_LIBRARY_VISIBILITY __attribute__ ((visibility("hidden")))
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#define LLVM_EXTERNAL_VISIBILITY __attribute__ ((visibility("default")))
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#else
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#define LLVM_LIBRARY_VISIBILITY
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#define LLVM_EXTERNAL_VISIBLITY
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#endif
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#if defined(__GNUC__)
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@ -1129,7 +1129,7 @@ void AArch64AsmPrinter::EmitInstruction(const MachineInstr *MI) {
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}
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// Force static initialization.
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extern "C" void LLVMInitializeAArch64AsmPrinter() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64AsmPrinter() {
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RegisterAsmPrinter<AArch64AsmPrinter> X(getTheAArch64leTarget());
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RegisterAsmPrinter<AArch64AsmPrinter> Y(getTheAArch64beTarget());
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RegisterAsmPrinter<AArch64AsmPrinter> Z(getTheARM64Target());
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@ -152,7 +152,7 @@ static cl::opt<bool>
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cl::desc("Enable the AAcrh64 branch target pass"),
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cl::init(true));
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extern "C" void LLVMInitializeAArch64Target() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64Target() {
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// Register the target.
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RegisterTargetMachine<AArch64leTargetMachine> X(getTheAArch64leTarget());
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RegisterTargetMachine<AArch64beTargetMachine> Y(getTheAArch64beTarget());
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@ -5514,7 +5514,7 @@ AArch64AsmParser::classifySymbolRef(const MCExpr *Expr,
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}
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/// Force static initialization.
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extern "C" void LLVMInitializeAArch64AsmParser() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64AsmParser() {
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RegisterMCAsmParser<AArch64AsmParser> X(getTheAArch64leTarget());
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RegisterMCAsmParser<AArch64AsmParser> Y(getTheAArch64beTarget());
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RegisterMCAsmParser<AArch64AsmParser> Z(getTheARM64Target());
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@ -278,7 +278,7 @@ createAArch64ExternalSymbolizer(const Triple &TT, LLVMOpInfoCallback GetOpInfo,
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SymbolLookUp, DisInfo);
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}
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extern "C" void LLVMInitializeAArch64Disassembler() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64Disassembler() {
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TargetRegistry::RegisterMCDisassembler(getTheAArch64leTarget(),
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createAArch64Disassembler);
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TargetRegistry::RegisterMCDisassembler(getTheAArch64beTarget(),
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@ -365,7 +365,7 @@ static MCInstrAnalysis *createAArch64InstrAnalysis(const MCInstrInfo *Info) {
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}
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// Force static initialization.
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extern "C" void LLVMInitializeAArch64TargetMC() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64TargetMC() {
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for (Target *T : {&getTheAArch64leTarget(), &getTheAArch64beTarget(),
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&getTheAArch64_32Target(), &getTheARM64Target(),
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&getTheARM64_32Target()}) {
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@ -31,7 +31,7 @@ Target &llvm::getTheARM64_32Target() {
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return TheARM64_32Target;
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}
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extern "C" void LLVMInitializeAArch64TargetInfo() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64TargetInfo() {
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// Now register the "arm64" name for use with "-march". We don't want it to
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// take possession of the Triple::aarch64 tags though.
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TargetRegistry::RegisterTarget(getTheARM64Target(), "arm64",
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@ -91,7 +91,7 @@ createAMDGPUAsmPrinterPass(TargetMachine &tm,
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return new AMDGPUAsmPrinter(tm, std::move(Streamer));
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}
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extern "C" void LLVMInitializeAMDGPUAsmPrinter() {
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extern "C" void LLVM_EXTERNAL_VISIBILITY LLVMInitializeAMDGPUAsmPrinter() {
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TargetRegistry::RegisterAsmPrinter(getTheAMDGPUTarget(),
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llvm::createR600AsmPrinterPass);
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TargetRegistry::RegisterAsmPrinter(getTheGCNTarget(),
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@ -182,7 +182,7 @@ static cl::opt<bool> EnableScalarIRPasses(
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cl::init(true),
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cl::Hidden);
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extern "C" void LLVMInitializeAMDGPUTarget() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUTarget() {
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// Register the target
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RegisterTargetMachine<R600TargetMachine> X(getTheAMDGPUTarget());
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RegisterTargetMachine<GCNTargetMachine> Y(getTheGCNTarget());
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@ -6404,7 +6404,7 @@ void AMDGPUAsmParser::cvtSDWA(MCInst &Inst, const OperandVector &Operands,
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}
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/// Force static initialization.
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extern "C" void LLVMInitializeAMDGPUAsmParser() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUAsmParser() {
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RegisterMCAsmParser<AMDGPUAsmParser> A(getTheAMDGPUTarget());
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RegisterMCAsmParser<AMDGPUAsmParser> B(getTheGCNTarget());
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}
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@ -1091,7 +1091,7 @@ static MCDisassembler *createAMDGPUDisassembler(const Target &T,
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return new AMDGPUDisassembler(STI, Ctx, T.createMCInstrInfo());
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}
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extern "C" void LLVMInitializeAMDGPUDisassembler() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUDisassembler() {
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TargetRegistry::RegisterMCDisassembler(getTheGCNTarget(),
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createAMDGPUDisassembler);
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TargetRegistry::RegisterMCSymbolizer(getTheGCNTarget(),
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@ -134,7 +134,7 @@ static MCInstrAnalysis *createAMDGPUMCInstrAnalysis(const MCInstrInfo *Info) {
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return new AMDGPUMCInstrAnalysis(Info);
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}
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extern "C" void LLVMInitializeAMDGPUTargetMC() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUTargetMC() {
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TargetRegistry::RegisterMCInstrInfo(getTheGCNTarget(), createAMDGPUMCInstrInfo);
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TargetRegistry::RegisterMCInstrInfo(getTheAMDGPUTarget(), createR600MCInstrInfo);
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@ -28,7 +28,7 @@ Target &llvm::getTheGCNTarget() {
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}
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/// Extern function to initialize the targets for the AMDGPU backend
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extern "C" void LLVMInitializeAMDGPUTargetInfo() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUTargetInfo() {
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RegisterTarget<Triple::r600, false> R600(getTheAMDGPUTarget(), "r600",
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"AMD GPUs HD2XXX-HD6XXX", "AMDGPU");
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RegisterTarget<Triple::amdgcn, false> GCN(getTheGCNTarget(), "amdgcn",
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@ -62,6 +62,6 @@ void ARCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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}
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// Force static initialization.
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extern "C" void LLVMInitializeARCAsmPrinter() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARCAsmPrinter() {
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RegisterAsmPrinter<ARCAsmPrinter> X(getTheARCTarget());
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}
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@ -81,7 +81,7 @@ void ARCPassConfig::addPreRegAlloc() {
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}
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// Force static initialization.
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extern "C" void LLVMInitializeARCTarget() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARCTarget() {
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RegisterTargetMachine<ARCTargetMachine> X(getTheARCTarget());
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}
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@ -365,7 +365,7 @@ static MCDisassembler *createARCDisassembler(const Target &T,
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return new ARCDisassembler(STI, Ctx, T.createMCInstrInfo());
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}
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extern "C" void LLVMInitializeARCDisassembler() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARCDisassembler() {
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// Register the disassembler.
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TargetRegistry::RegisterMCDisassembler(getTheARCTarget(),
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createARCDisassembler);
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@ -81,7 +81,7 @@ static MCTargetStreamer *createTargetAsmStreamer(MCStreamer &S,
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}
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// Force static initialization.
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extern "C" void LLVMInitializeARCTargetMC() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARCTargetMC() {
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// Register the MC asm info.
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Target &TheARCTarget = getTheARCTarget();
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RegisterMCAsmInfoFn X(TheARCTarget, createARCMCAsmInfo);
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@ -16,6 +16,6 @@ Target &llvm::getTheARCTarget() {
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return TheARCTarget;
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}
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extern "C" void LLVMInitializeARCTargetInfo() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARCTargetInfo() {
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RegisterTarget<Triple::arc> X(getTheARCTarget(), "arc", "ARC", "ARC");
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}
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@ -2066,7 +2066,7 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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//===----------------------------------------------------------------------===//
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// Force static initialization.
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extern "C" void LLVMInitializeARMAsmPrinter() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARMAsmPrinter() {
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RegisterAsmPrinter<ARMAsmPrinter> X(getTheARMLETarget());
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RegisterAsmPrinter<ARMAsmPrinter> Y(getTheARMBETarget());
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RegisterAsmPrinter<ARMAsmPrinter> A(getTheThumbLETarget());
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@ -78,7 +78,7 @@ namespace llvm {
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void initializeARMExecutionDomainFixPass(PassRegistry&);
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}
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extern "C" void LLVMInitializeARMTarget() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARMTarget() {
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// Register the target.
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RegisterTargetMachine<ARMLETargetMachine> X(getTheARMLETarget());
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RegisterTargetMachine<ARMLETargetMachine> A(getTheThumbLETarget());
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@ -10390,7 +10390,7 @@ bool ARMAsmParser::parseDirectiveThumbSet(SMLoc L) {
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}
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/// Force static initialization.
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extern "C" void LLVMInitializeARMAsmParser() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARMAsmParser() {
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RegisterMCAsmParser<ARMAsmParser> X(getTheARMLETarget());
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RegisterMCAsmParser<ARMAsmParser> Y(getTheARMBETarget());
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RegisterMCAsmParser<ARMAsmParser> A(getTheThumbLETarget());
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@ -874,7 +874,7 @@ DecodeStatus ThumbDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
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return MCDisassembler::Fail;
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}
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extern "C" void LLVMInitializeARMDisassembler() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARMDisassembler() {
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TargetRegistry::RegisterMCDisassembler(getTheARMLETarget(),
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createARMDisassembler);
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TargetRegistry::RegisterMCDisassembler(getTheARMBETarget(),
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@ -300,7 +300,7 @@ static MCInstrAnalysis *createThumbMCInstrAnalysis(const MCInstrInfo *Info) {
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}
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// Force static initialization.
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extern "C" void LLVMInitializeARMTargetMC() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARMTargetMC() {
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for (Target *T : {&getTheARMLETarget(), &getTheARMBETarget(),
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&getTheThumbLETarget(), &getTheThumbBETarget()}) {
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// Register the MC asm info.
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@ -27,7 +27,7 @@ Target &llvm::getTheThumbBETarget() {
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return TheThumbBETarget;
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}
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extern "C" void LLVMInitializeARMTargetInfo() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARMTargetInfo() {
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RegisterTarget<Triple::arm, /*HasJIT=*/true> X(getTheARMLETarget(), "arm",
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"ARM", "ARM");
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RegisterTarget<Triple::armeb, /*HasJIT=*/true> Y(getTheARMBETarget(), "armeb",
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@ -178,7 +178,7 @@ void AVRAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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} // end of namespace llvm
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extern "C" void LLVMInitializeAVRAsmPrinter() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAVRAsmPrinter() {
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llvm::RegisterAsmPrinter<llvm::AVRAsmPrinter> X(llvm::getTheAVRTarget());
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}
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@ -76,7 +76,7 @@ TargetPassConfig *AVRTargetMachine::createPassConfig(PassManagerBase &PM) {
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return new AVRPassConfig(*this, PM);
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}
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extern "C" void LLVMInitializeAVRTarget() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAVRTarget() {
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// Register the target.
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RegisterTargetMachine<AVRTargetMachine> X(getTheAVRTarget());
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@ -682,7 +682,7 @@ bool AVRAsmParser::parseLiteralValues(unsigned SizeInBytes, SMLoc L) {
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return (parseMany(parseOne));
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}
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extern "C" void LLVMInitializeAVRAsmParser() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAVRAsmParser() {
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RegisterMCAsmParser<AVRAsmParser> X(getTheAVRTarget());
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}
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@ -52,7 +52,7 @@ static MCDisassembler *createAVRDisassembler(const Target &T,
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}
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extern "C" void LLVMInitializeAVRDisassembler() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAVRDisassembler() {
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// Register the disassembler.
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TargetRegistry::RegisterMCDisassembler(getTheAVRTarget(),
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createAVRDisassembler);
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@ -89,7 +89,7 @@ static MCTargetStreamer *createMCAsmTargetStreamer(MCStreamer &S,
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return new AVRTargetAsmStreamer(S);
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}
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extern "C" void LLVMInitializeAVRTargetMC() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAVRTargetMC() {
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// Register the MC asm info.
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RegisterMCAsmInfo<AVRMCAsmInfo> X(getTheAVRTarget());
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@ -15,7 +15,7 @@ Target &getTheAVRTarget() {
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}
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}
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extern "C" void LLVMInitializeAVRTargetInfo() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAVRTargetInfo() {
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llvm::RegisterTarget<llvm::Triple::avr> X(llvm::getTheAVRTarget(), "avr",
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"Atmel AVR Microcontroller", "AVR");
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}
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@ -493,7 +493,7 @@ bool BPFAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
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bool BPFAsmParser::ParseDirective(AsmToken DirectiveID) { return true; }
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extern "C" void LLVMInitializeBPFAsmParser() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeBPFAsmParser() {
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RegisterMCAsmParser<BPFAsmParser> X(getTheBPFTarget());
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RegisterMCAsmParser<BPFAsmParser> Y(getTheBPFleTarget());
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RegisterMCAsmParser<BPFAsmParser> Z(getTheBPFbeTarget());
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@ -142,7 +142,7 @@ void BPFAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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}
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// Force static initialization.
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extern "C" void LLVMInitializeBPFAsmPrinter() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeBPFAsmPrinter() {
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RegisterAsmPrinter<BPFAsmPrinter> X(getTheBPFleTarget());
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RegisterAsmPrinter<BPFAsmPrinter> Y(getTheBPFbeTarget());
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RegisterAsmPrinter<BPFAsmPrinter> Z(getTheBPFTarget());
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@ -27,7 +27,7 @@ static cl::
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opt<bool> DisableMIPeephole("disable-bpf-peephole", cl::Hidden,
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cl::desc("Disable machine peepholes for BPF"));
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extern "C" void LLVMInitializeBPFTarget() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeBPFTarget() {
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// Register the target.
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RegisterTargetMachine<BPFTargetMachine> X(getTheBPFleTarget());
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RegisterTargetMachine<BPFTargetMachine> Y(getTheBPFbeTarget());
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@ -84,7 +84,7 @@ static MCDisassembler *createBPFDisassembler(const Target &T,
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}
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extern "C" void LLVMInitializeBPFDisassembler() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeBPFDisassembler() {
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// Register the disassembler.
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TargetRegistry::RegisterMCDisassembler(getTheBPFTarget(),
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createBPFDisassembler);
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@ -97,7 +97,7 @@ static MCInstrAnalysis *createBPFInstrAnalysis(const MCInstrInfo *Info) {
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return new BPFMCInstrAnalysis(Info);
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}
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extern "C" void LLVMInitializeBPFTargetMC() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeBPFTargetMC() {
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for (Target *T :
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{&getTheBPFleTarget(), &getTheBPFbeTarget(), &getTheBPFTarget()}) {
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// Register the MC asm info.
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@ -24,7 +24,7 @@ Target &llvm::getTheBPFTarget() {
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return TheBPFTarget;
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}
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extern "C" void LLVMInitializeBPFTargetInfo() {
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeBPFTargetInfo() {
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TargetRegistry::RegisterTarget(getTheBPFTarget(), "bpf", "BPF (host endian)",
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"BPF", [](Triple::ArchType) { return false; },
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true);
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@ -13,6 +13,14 @@ add_llvm_library(LLVMTarget
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${LLVM_MAIN_INCLUDE_DIR}/llvm/Target
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)
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||||
|
||||
# When building shared objects for each target there are some internal APIs
|
||||
# that are used across shared objects which we can't hide.
|
||||
if (NOT BUILD_SHARED_LIBS)
|
||||
# Set default visibility to hidden, so we don't export all the Target classes
|
||||
# in libLLVM.so.
|
||||
set(CMAKE_CXX_VISIBILITY_PRESET hidden)
|
||||
endif()
|
||||
|
||||
foreach(t ${LLVM_TARGETS_TO_BUILD})
|
||||
message(STATUS "Targeting ${t}")
|
||||
add_subdirectory(${t})
|
||||
|
@ -813,10 +813,10 @@ bool HexagonAsmParser::RegisterMatchesArch(unsigned MatchNum) const {
|
||||
return true;
|
||||
}
|
||||
|
||||
// extern "C" void LLVMInitializeHexagonAsmLexer();
|
||||
// extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeHexagonAsmLexer();
|
||||
|
||||
/// Force static initialization.
|
||||
extern "C" void LLVMInitializeHexagonAsmParser() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeHexagonAsmParser() {
|
||||
RegisterMCAsmParser<HexagonAsmParser> X(getTheHexagonTarget());
|
||||
}
|
||||
|
||||
|
@ -158,7 +158,7 @@ static MCDisassembler *createHexagonDisassembler(const Target &T,
|
||||
return new HexagonDisassembler(STI, Ctx, T.createMCInstrInfo());
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeHexagonDisassembler() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeHexagonDisassembler() {
|
||||
TargetRegistry::RegisterMCDisassembler(getTheHexagonTarget(),
|
||||
createHexagonDisassembler);
|
||||
}
|
||||
|
@ -771,6 +771,6 @@ void HexagonAsmPrinter::EmitInstruction(const MachineInstr *MI) {
|
||||
OutStreamer->EmitInstruction(MCB, getSubtargetInfo());
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeHexagonAsmPrinter() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeHexagonAsmPrinter() {
|
||||
RegisterAsmPrinter<HexagonAsmPrinter> X(getTheHexagonTarget());
|
||||
}
|
||||
|
@ -180,7 +180,7 @@ static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
|
||||
return *RM;
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeHexagonTarget() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeHexagonTarget() {
|
||||
// Register the target.
|
||||
RegisterTargetMachine<HexagonTargetMachine> X(getTheHexagonTarget());
|
||||
|
||||
|
@ -456,7 +456,7 @@ static MCInstrAnalysis *createHexagonMCInstrAnalysis(const MCInstrInfo *Info) {
|
||||
}
|
||||
|
||||
// Force static initialization.
|
||||
extern "C" void LLVMInitializeHexagonTargetMC() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeHexagonTargetMC() {
|
||||
// Register the MC asm info.
|
||||
RegisterMCAsmInfoFn X(getTheHexagonTarget(), createHexagonMCAsmInfo);
|
||||
|
||||
|
@ -15,7 +15,7 @@ Target &llvm::getTheHexagonTarget() {
|
||||
return TheHexagonTarget;
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeHexagonTargetInfo() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeHexagonTargetInfo() {
|
||||
RegisterTarget<Triple::hexagon, /*HasJIT=*/true> X(
|
||||
getTheHexagonTarget(), "hexagon", "Hexagon", "Hexagon");
|
||||
}
|
||||
|
@ -1223,6 +1223,6 @@ bool LanaiAsmParser::ParseInstruction(ParseInstructionInfo & /*Info*/,
|
||||
#define GET_MATCHER_IMPLEMENTATION
|
||||
#include "LanaiGenAsmMatcher.inc"
|
||||
|
||||
extern "C" void LLVMInitializeLanaiAsmParser() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLanaiAsmParser() {
|
||||
RegisterMCAsmParser<LanaiAsmParser> x(getTheLanaiTarget());
|
||||
}
|
||||
|
@ -36,7 +36,7 @@ static MCDisassembler *createLanaiDisassembler(const Target & /*T*/,
|
||||
return new LanaiDisassembler(STI, Ctx);
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeLanaiDisassembler() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLanaiDisassembler() {
|
||||
// Register the disassembler
|
||||
TargetRegistry::RegisterMCDisassembler(getTheLanaiTarget(),
|
||||
createLanaiDisassembler);
|
||||
|
@ -237,6 +237,6 @@ bool LanaiAsmPrinter::isBlockOnlyReachableByFallthrough(
|
||||
}
|
||||
|
||||
// Force static initialization.
|
||||
extern "C" void LLVMInitializeLanaiAsmPrinter() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLanaiAsmPrinter() {
|
||||
RegisterAsmPrinter<LanaiAsmPrinter> X(getTheLanaiTarget());
|
||||
}
|
||||
|
@ -30,7 +30,7 @@ namespace llvm {
|
||||
void initializeLanaiMemAluCombinerPass(PassRegistry &);
|
||||
} // namespace llvm
|
||||
|
||||
extern "C" void LLVMInitializeLanaiTarget() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLanaiTarget() {
|
||||
// Register the target.
|
||||
RegisterTargetMachine<LanaiTargetMachine> registered_target(
|
||||
getTheLanaiTarget());
|
||||
|
@ -123,7 +123,7 @@ static MCInstrAnalysis *createLanaiInstrAnalysis(const MCInstrInfo *Info) {
|
||||
return new LanaiMCInstrAnalysis(Info);
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeLanaiTargetMC() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLanaiTargetMC() {
|
||||
// Register the MC asm info.
|
||||
RegisterMCAsmInfo<LanaiMCAsmInfo> X(getTheLanaiTarget());
|
||||
|
||||
|
@ -16,7 +16,7 @@ Target &llvm::getTheLanaiTarget() {
|
||||
return TheLanaiTarget;
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeLanaiTargetInfo() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLanaiTargetInfo() {
|
||||
RegisterTarget<Triple::lanai> X(getTheLanaiTarget(), "lanai", "Lanai",
|
||||
"Lanai");
|
||||
}
|
||||
|
@ -529,7 +529,7 @@ bool MSP430AsmParser::ParseLiteralValues(unsigned Size, SMLoc L) {
|
||||
return (parseMany(parseOne));
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeMSP430AsmParser() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMSP430AsmParser() {
|
||||
RegisterMCAsmParser<MSP430AsmParser> X(getTheMSP430Target());
|
||||
}
|
||||
|
||||
|
@ -62,7 +62,7 @@ static MCDisassembler *createMSP430Disassembler(const Target &T,
|
||||
return new MSP430Disassembler(STI, Ctx);
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeMSP430Disassembler() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMSP430Disassembler() {
|
||||
TargetRegistry::RegisterMCDisassembler(getTheMSP430Target(),
|
||||
createMSP430Disassembler);
|
||||
}
|
||||
|
@ -57,7 +57,7 @@ static MCInstPrinter *createMSP430MCInstPrinter(const Triple &T,
|
||||
return nullptr;
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeMSP430TargetMC() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMSP430TargetMC() {
|
||||
Target &T = getTheMSP430Target();
|
||||
|
||||
RegisterMCAsmInfo<MSP430MCAsmInfo> X(T);
|
||||
|
@ -183,6 +183,6 @@ bool MSP430AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
|
||||
}
|
||||
|
||||
// Force static initialization.
|
||||
extern "C" void LLVMInitializeMSP430AsmPrinter() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMSP430AsmPrinter() {
|
||||
RegisterAsmPrinter<MSP430AsmPrinter> X(getTheMSP430Target());
|
||||
}
|
||||
|
@ -21,7 +21,7 @@
|
||||
#include "llvm/Support/TargetRegistry.h"
|
||||
using namespace llvm;
|
||||
|
||||
extern "C" void LLVMInitializeMSP430Target() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMSP430Target() {
|
||||
// Register the target.
|
||||
RegisterTargetMachine<MSP430TargetMachine> X(getTheMSP430Target());
|
||||
}
|
||||
|
@ -15,7 +15,7 @@ Target &llvm::getTheMSP430Target() {
|
||||
return TheMSP430Target;
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeMSP430TargetInfo() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMSP430TargetInfo() {
|
||||
RegisterTarget<Triple::msp430> X(getTheMSP430Target(), "msp430",
|
||||
"MSP430 [experimental]", "MSP430");
|
||||
}
|
||||
|
@ -8190,7 +8190,7 @@ bool MipsAsmParser::parseInternalDirectiveReallowModule() {
|
||||
return false;
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeMipsAsmParser() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsAsmParser() {
|
||||
RegisterMCAsmParser<MipsAsmParser> X(getTheMipsTarget());
|
||||
RegisterMCAsmParser<MipsAsmParser> Y(getTheMipselTarget());
|
||||
RegisterMCAsmParser<MipsAsmParser> A(getTheMips64Target());
|
||||
|
@ -555,7 +555,7 @@ static MCDisassembler *createMipselDisassembler(
|
||||
return new MipsDisassembler(STI, Ctx, false);
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeMipsDisassembler() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsDisassembler() {
|
||||
// Register the disassembler.
|
||||
TargetRegistry::RegisterMCDisassembler(getTheMipsTarget(),
|
||||
createMipsDisassembler);
|
||||
|
@ -162,7 +162,7 @@ static MCInstrAnalysis *createMipsMCInstrAnalysis(const MCInstrInfo *Info) {
|
||||
return new MipsMCInstrAnalysis(Info);
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeMipsTargetMC() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsTargetMC() {
|
||||
for (Target *T : {&getTheMipsTarget(), &getTheMipselTarget(),
|
||||
&getTheMips64Target(), &getTheMips64elTarget()}) {
|
||||
// Register the MC asm info.
|
||||
|
@ -1296,7 +1296,7 @@ bool MipsAsmPrinter::isLongBranchPseudo(int Opcode) const {
|
||||
}
|
||||
|
||||
// Force static initialization.
|
||||
extern "C" void LLVMInitializeMipsAsmPrinter() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsAsmPrinter() {
|
||||
RegisterAsmPrinter<MipsAsmPrinter> X(getTheMipsTarget());
|
||||
RegisterAsmPrinter<MipsAsmPrinter> Y(getTheMipselTarget());
|
||||
RegisterAsmPrinter<MipsAsmPrinter> A(getTheMips64Target());
|
||||
|
@ -44,7 +44,7 @@ using namespace llvm;
|
||||
|
||||
#define DEBUG_TYPE "mips"
|
||||
|
||||
extern "C" void LLVMInitializeMipsTarget() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsTarget() {
|
||||
// Register the target.
|
||||
RegisterTargetMachine<MipsebTargetMachine> X(getTheMipsTarget());
|
||||
RegisterTargetMachine<MipselTargetMachine> Y(getTheMipselTarget());
|
||||
|
@ -27,7 +27,7 @@ Target &llvm::getTheMips64elTarget() {
|
||||
return TheMips64elTarget;
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeMipsTargetInfo() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsTargetInfo() {
|
||||
RegisterTarget<Triple::mips,
|
||||
/*HasJIT=*/true>
|
||||
X(getTheMipsTarget(), "mips", "MIPS (32-bit big endian)", "Mips");
|
||||
|
@ -66,7 +66,7 @@ static MCTargetStreamer *createTargetAsmStreamer(MCStreamer &S,
|
||||
}
|
||||
|
||||
// Force static initialization.
|
||||
extern "C" void LLVMInitializeNVPTXTargetMC() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeNVPTXTargetMC() {
|
||||
for (Target *T : {&getTheNVPTXTarget32(), &getTheNVPTXTarget64()}) {
|
||||
// Register the MC asm info.
|
||||
RegisterMCAsmInfo<NVPTXMCAsmInfo> X(*T);
|
||||
|
@ -2260,7 +2260,7 @@ void NVPTXAsmPrinter::printMemOperand(const MachineInstr *MI, int opNum,
|
||||
}
|
||||
|
||||
// Force static initialization.
|
||||
extern "C" void LLVMInitializeNVPTXAsmPrinter() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeNVPTXAsmPrinter() {
|
||||
RegisterAsmPrinter<NVPTXAsmPrinter> X(getTheNVPTXTarget32());
|
||||
RegisterAsmPrinter<NVPTXAsmPrinter> Y(getTheNVPTXTarget64());
|
||||
}
|
||||
|
@ -72,7 +72,7 @@ void initializeNVPTXProxyRegErasurePass(PassRegistry &);
|
||||
|
||||
} // end namespace llvm
|
||||
|
||||
extern "C" void LLVMInitializeNVPTXTarget() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeNVPTXTarget() {
|
||||
// Register the target.
|
||||
RegisterTargetMachine<NVPTXTargetMachine32> X(getTheNVPTXTarget32());
|
||||
RegisterTargetMachine<NVPTXTargetMachine64> Y(getTheNVPTXTarget64());
|
||||
|
@ -19,7 +19,7 @@ Target &llvm::getTheNVPTXTarget64() {
|
||||
return TheNVPTXTarget64;
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeNVPTXTargetInfo() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeNVPTXTargetInfo() {
|
||||
RegisterTarget<Triple::nvptx> X(getTheNVPTXTarget32(), "nvptx",
|
||||
"NVIDIA PTX 32-bit", "NVPTX");
|
||||
RegisterTarget<Triple::nvptx64> Y(getTheNVPTXTarget64(), "nvptx64",
|
||||
|
@ -1786,7 +1786,7 @@ bool PPCAsmParser::ParseDirectiveLocalEntry(SMLoc L) {
|
||||
|
||||
|
||||
/// Force static initialization.
|
||||
extern "C" void LLVMInitializePowerPCAsmParser() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCAsmParser() {
|
||||
RegisterMCAsmParser<PPCAsmParser> A(getThePPC32Target());
|
||||
RegisterMCAsmParser<PPCAsmParser> B(getThePPC64Target());
|
||||
RegisterMCAsmParser<PPCAsmParser> C(getThePPC64LETarget());
|
||||
|
@ -51,7 +51,7 @@ static MCDisassembler *createPPCLEDisassembler(const Target &T,
|
||||
return new PPCDisassembler(STI, Ctx, /*IsLittleEndian=*/true);
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializePowerPCDisassembler() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCDisassembler() {
|
||||
// Register the disassembler for each target.
|
||||
TargetRegistry::RegisterMCDisassembler(getThePPC32Target(),
|
||||
createPPCDisassembler);
|
||||
|
@ -260,7 +260,7 @@ static MCInstPrinter *createPPCMCInstPrinter(const Triple &T,
|
||||
return new PPCInstPrinter(MAI, MII, MRI, T);
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializePowerPCTargetMC() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCTargetMC() {
|
||||
for (Target *T :
|
||||
{&getThePPC32Target(), &getThePPC64Target(), &getThePPC64LETarget()}) {
|
||||
// Register the MC asm info.
|
||||
|
@ -1651,7 +1651,7 @@ createPPCAsmPrinterPass(TargetMachine &tm,
|
||||
}
|
||||
|
||||
// Force static initialization.
|
||||
extern "C" void LLVMInitializePowerPCAsmPrinter() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCAsmPrinter() {
|
||||
TargetRegistry::RegisterAsmPrinter(getThePPC32Target(),
|
||||
createPPCAsmPrinterPass);
|
||||
TargetRegistry::RegisterAsmPrinter(getThePPC64Target(),
|
||||
|
@ -94,7 +94,7 @@ static cl::opt<bool>
|
||||
ReduceCRLogical("ppc-reduce-cr-logicals",
|
||||
cl::desc("Expand eligible cr-logical binary ops to branches"),
|
||||
cl::init(false), cl::Hidden);
|
||||
extern "C" void LLVMInitializePowerPCTarget() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCTarget() {
|
||||
// Register the targets
|
||||
RegisterTargetMachine<PPCTargetMachine> A(getThePPC32Target());
|
||||
RegisterTargetMachine<PPCTargetMachine> B(getThePPC64Target());
|
||||
|
@ -23,7 +23,7 @@ Target &llvm::getThePPC64LETarget() {
|
||||
return ThePPC64LETarget;
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializePowerPCTargetInfo() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCTargetInfo() {
|
||||
RegisterTarget<Triple::ppc, /*HasJIT=*/true> X(getThePPC32Target(), "ppc32",
|
||||
"PowerPC 32", "PPC");
|
||||
|
||||
|
@ -1754,7 +1754,7 @@ bool RISCVAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
|
||||
return false;
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeRISCVAsmParser() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVAsmParser() {
|
||||
RegisterMCAsmParser<RISCVAsmParser> X(getTheRISCV32Target());
|
||||
RegisterMCAsmParser<RISCVAsmParser> Y(getTheRISCV64Target());
|
||||
}
|
||||
|
@ -48,7 +48,7 @@ static MCDisassembler *createRISCVDisassembler(const Target &T,
|
||||
return new RISCVDisassembler(STI, Ctx);
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeRISCVDisassembler() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVDisassembler() {
|
||||
// Register the disassembler for each target.
|
||||
TargetRegistry::RegisterMCDisassembler(getTheRISCV32Target(),
|
||||
createRISCVDisassembler);
|
||||
|
@ -84,7 +84,7 @@ static MCTargetStreamer *createRISCVAsmTargetStreamer(MCStreamer &S,
|
||||
return new RISCVTargetAsmStreamer(S, OS);
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeRISCVTargetMC() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVTargetMC() {
|
||||
for (Target *T : {&getTheRISCV32Target(), &getTheRISCV64Target()}) {
|
||||
TargetRegistry::RegisterMCAsmInfo(*T, createRISCVMCAsmInfo);
|
||||
TargetRegistry::RegisterMCInstrInfo(*T, createRISCVMCInstrInfo);
|
||||
|
@ -123,7 +123,7 @@ bool RISCVAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
|
||||
}
|
||||
|
||||
// Force static initialization.
|
||||
extern "C" void LLVMInitializeRISCVAsmPrinter() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVAsmPrinter() {
|
||||
RegisterAsmPrinter<RISCVAsmPrinter> X(getTheRISCV32Target());
|
||||
RegisterAsmPrinter<RISCVAsmPrinter> Y(getTheRISCV64Target());
|
||||
}
|
||||
|
@ -24,7 +24,7 @@
|
||||
#include "llvm/Target/TargetOptions.h"
|
||||
using namespace llvm;
|
||||
|
||||
extern "C" void LLVMInitializeRISCVTarget() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVTarget() {
|
||||
RegisterTargetMachine<RISCVTargetMachine> X(getTheRISCV32Target());
|
||||
RegisterTargetMachine<RISCVTargetMachine> Y(getTheRISCV64Target());
|
||||
auto PR = PassRegistry::getPassRegistry();
|
||||
|
@ -20,7 +20,7 @@ Target &llvm::getTheRISCV64Target() {
|
||||
return TheRISCV64Target;
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeRISCVTargetInfo() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVTargetInfo() {
|
||||
RegisterTarget<Triple::riscv32> X(getTheRISCV32Target(), "riscv32",
|
||||
"32-bit RISC-V", "RISCV");
|
||||
RegisterTarget<Triple::riscv64> Y(getTheRISCV64Target(), "riscv64",
|
||||
|
@ -1308,7 +1308,7 @@ bool SparcAsmParser::matchSparcAsmModifiers(const MCExpr *&EVal,
|
||||
return true;
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeSparcAsmParser() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSparcAsmParser() {
|
||||
RegisterMCAsmParser<SparcAsmParser> A(getTheSparcTarget());
|
||||
RegisterMCAsmParser<SparcAsmParser> B(getTheSparcV9Target());
|
||||
RegisterMCAsmParser<SparcAsmParser> C(getTheSparcelTarget());
|
||||
|
@ -48,7 +48,7 @@ static MCDisassembler *createSparcDisassembler(const Target &T,
|
||||
}
|
||||
|
||||
|
||||
extern "C" void LLVMInitializeSparcDisassembler() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSparcDisassembler() {
|
||||
// Register the disassembler.
|
||||
TargetRegistry::RegisterMCDisassembler(getTheSparcTarget(),
|
||||
createSparcDisassembler);
|
||||
|
@ -89,7 +89,7 @@ static MCInstPrinter *createSparcMCInstPrinter(const Triple &T,
|
||||
return new SparcInstPrinter(MAI, MII, MRI);
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeSparcTargetMC() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSparcTargetMC() {
|
||||
// Register the MC asm info.
|
||||
RegisterMCAsmInfoFn X(getTheSparcTarget(), createSparcMCAsmInfo);
|
||||
RegisterMCAsmInfoFn Y(getTheSparcV9Target(), createSparcV9MCAsmInfo);
|
||||
|
@ -439,7 +439,7 @@ bool SparcAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
|
||||
}
|
||||
|
||||
// Force static initialization.
|
||||
extern "C" void LLVMInitializeSparcAsmPrinter() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSparcAsmPrinter() {
|
||||
RegisterAsmPrinter<SparcAsmPrinter> X(getTheSparcTarget());
|
||||
RegisterAsmPrinter<SparcAsmPrinter> Y(getTheSparcV9Target());
|
||||
RegisterAsmPrinter<SparcAsmPrinter> Z(getTheSparcelTarget());
|
||||
|
@ -20,7 +20,7 @@
|
||||
#include "llvm/Support/TargetRegistry.h"
|
||||
using namespace llvm;
|
||||
|
||||
extern "C" void LLVMInitializeSparcTarget() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSparcTarget() {
|
||||
// Register the target.
|
||||
RegisterTargetMachine<SparcV8TargetMachine> X(getTheSparcTarget());
|
||||
RegisterTargetMachine<SparcV9TargetMachine> Y(getTheSparcV9Target());
|
||||
|
@ -23,7 +23,7 @@ Target &llvm::getTheSparcelTarget() {
|
||||
return TheSparcelTarget;
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeSparcTargetInfo() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSparcTargetInfo() {
|
||||
RegisterTarget<Triple::sparc, /*HasJIT=*/true> X(getTheSparcTarget(), "sparc",
|
||||
"Sparc", "Sparc");
|
||||
RegisterTarget<Triple::sparcv9, /*HasJIT=*/true> Y(
|
||||
|
@ -1371,6 +1371,6 @@ SystemZAsmParser::parsePCRel(OperandVector &Operands, int64_t MinVal,
|
||||
}
|
||||
|
||||
// Force static initialization.
|
||||
extern "C" void LLVMInitializeSystemZAsmParser() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSystemZAsmParser() {
|
||||
RegisterMCAsmParser<SystemZAsmParser> X(getTheSystemZTarget());
|
||||
}
|
||||
|
@ -46,7 +46,7 @@ static MCDisassembler *createSystemZDisassembler(const Target &T,
|
||||
return new SystemZDisassembler(STI, Ctx);
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeSystemZDisassembler() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSystemZDisassembler() {
|
||||
// Register the disassembler.
|
||||
TargetRegistry::RegisterMCDisassembler(getTheSystemZTarget(),
|
||||
createSystemZDisassembler);
|
||||
|
@ -182,7 +182,7 @@ static MCInstPrinter *createSystemZMCInstPrinter(const Triple &T,
|
||||
return new SystemZInstPrinter(MAI, MII, MRI);
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeSystemZTargetMC() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSystemZTargetMC() {
|
||||
// Register the MCAsmInfo.
|
||||
TargetRegistry::RegisterMCAsmInfo(getTheSystemZTarget(),
|
||||
createSystemZMCAsmInfo);
|
||||
|
@ -644,6 +644,6 @@ void SystemZAsmPrinter::EmitEndOfAsmFile(Module &M) {
|
||||
}
|
||||
|
||||
// Force static initialization.
|
||||
extern "C" void LLVMInitializeSystemZAsmPrinter() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSystemZAsmPrinter() {
|
||||
RegisterAsmPrinter<SystemZAsmPrinter> X(getTheSystemZTarget());
|
||||
}
|
||||
|
@ -29,7 +29,7 @@
|
||||
|
||||
using namespace llvm;
|
||||
|
||||
extern "C" void LLVMInitializeSystemZTarget() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSystemZTarget() {
|
||||
// Register the target.
|
||||
RegisterTargetMachine<SystemZTargetMachine> X(getTheSystemZTarget());
|
||||
}
|
||||
|
@ -16,7 +16,7 @@ Target &llvm::getTheSystemZTarget() {
|
||||
return TheSystemZTarget;
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeSystemZTargetInfo() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSystemZTargetInfo() {
|
||||
RegisterTarget<Triple::systemz, /*HasJIT=*/true> X(
|
||||
getTheSystemZTarget(), "systemz", "SystemZ", "SystemZ");
|
||||
}
|
||||
|
@ -764,7 +764,7 @@ public:
|
||||
} // end anonymous namespace
|
||||
|
||||
// Force static initialization.
|
||||
extern "C" void LLVMInitializeWebAssemblyAsmParser() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyAsmParser() {
|
||||
RegisterMCAsmParser<WebAssemblyAsmParser> X(getTheWebAssemblyTarget32());
|
||||
RegisterMCAsmParser<WebAssemblyAsmParser> Y(getTheWebAssemblyTarget64());
|
||||
}
|
||||
|
@ -65,7 +65,7 @@ static MCDisassembler *createWebAssemblyDisassembler(const Target &T,
|
||||
return new WebAssemblyDisassembler(STI, Ctx, std::move(MCII));
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeWebAssemblyDisassembler() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyDisassembler() {
|
||||
// Register the disassembler for each target.
|
||||
TargetRegistry::RegisterMCDisassembler(getTheWebAssemblyTarget32(),
|
||||
createWebAssemblyDisassembler);
|
||||
|
@ -95,7 +95,7 @@ static MCTargetStreamer *createNullTargetStreamer(MCStreamer &S) {
|
||||
}
|
||||
|
||||
// Force static initialization.
|
||||
extern "C" void LLVMInitializeWebAssemblyTargetMC() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyTargetMC() {
|
||||
for (Target *T :
|
||||
{&getTheWebAssemblyTarget32(), &getTheWebAssemblyTarget64()}) {
|
||||
// Register the MC asm info.
|
||||
|
@ -26,7 +26,7 @@ Target &llvm::getTheWebAssemblyTarget64() {
|
||||
return TheWebAssemblyTarget64;
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeWebAssemblyTargetInfo() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyTargetInfo() {
|
||||
RegisterTarget<Triple::wasm32> X(getTheWebAssemblyTarget32(), "wasm32",
|
||||
"WebAssembly 32-bit", "WebAssembly");
|
||||
RegisterTarget<Triple::wasm64> Y(getTheWebAssemblyTarget64(), "wasm64",
|
||||
|
@ -443,7 +443,7 @@ bool WebAssemblyAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
|
||||
}
|
||||
|
||||
// Force static initialization.
|
||||
extern "C" void LLVMInitializeWebAssemblyAsmPrinter() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyAsmPrinter() {
|
||||
RegisterAsmPrinter<WebAssemblyAsmPrinter> X(getTheWebAssemblyTarget32());
|
||||
RegisterAsmPrinter<WebAssemblyAsmPrinter> Y(getTheWebAssemblyTarget64());
|
||||
}
|
||||
|
@ -45,7 +45,7 @@ static cl::opt<bool> EnableEmSjLj(
|
||||
cl::desc("WebAssembly Emscripten-style setjmp/longjmp handling"),
|
||||
cl::init(false));
|
||||
|
||||
extern "C" void LLVMInitializeWebAssemblyTarget() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyTarget() {
|
||||
// Register the target.
|
||||
RegisterTargetMachine<WebAssemblyTargetMachine> X(
|
||||
getTheWebAssemblyTarget32());
|
||||
|
@ -3709,7 +3709,7 @@ bool X86AsmParser::parseDirectiveFPOEndProc(SMLoc L) {
|
||||
}
|
||||
|
||||
// Force static initialization.
|
||||
extern "C" void LLVMInitializeX86AsmParser() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeX86AsmParser() {
|
||||
RegisterMCAsmParser<X86AsmParser> X(getTheX86_32Target());
|
||||
RegisterMCAsmParser<X86AsmParser> Y(getTheX86_64Target());
|
||||
}
|
||||
|
@ -844,7 +844,7 @@ static MCDisassembler *createX86Disassembler(const Target &T,
|
||||
return new X86GenericDisassembler(STI, Ctx, std::move(MII));
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeX86Disassembler() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeX86Disassembler() {
|
||||
// Register the disassembler.
|
||||
TargetRegistry::RegisterMCDisassembler(getTheX86_32Target(),
|
||||
createX86Disassembler);
|
||||
|
@ -523,7 +523,7 @@ static MCInstrAnalysis *createX86MCInstrAnalysis(const MCInstrInfo *Info) {
|
||||
}
|
||||
|
||||
// Force static initialization.
|
||||
extern "C" void LLVMInitializeX86TargetMC() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeX86TargetMC() {
|
||||
for (Target *T : {&getTheX86_32Target(), &getTheX86_64Target()}) {
|
||||
// Register the MC asm info.
|
||||
RegisterMCAsmInfoFn X(*T, createX86MCAsmInfo);
|
||||
|
@ -19,7 +19,7 @@ Target &llvm::getTheX86_64Target() {
|
||||
return TheX86_64Target;
|
||||
}
|
||||
|
||||
extern "C" void LLVMInitializeX86TargetInfo() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeX86TargetInfo() {
|
||||
RegisterTarget<Triple::x86, /*HasJIT=*/true> X(
|
||||
getTheX86_32Target(), "x86", "32-bit X86: Pentium-Pro and above", "X86");
|
||||
|
||||
|
@ -727,7 +727,7 @@ void X86AsmPrinter::EmitEndOfAsmFile(Module &M) {
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
// Force static initialization.
|
||||
extern "C" void LLVMInitializeX86AsmPrinter() {
|
||||
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeX86AsmPrinter() {
|
||||
RegisterAsmPrinter<X86AsmPrinter> X(getTheX86_32Target());
|
||||
RegisterAsmPrinter<X86AsmPrinter> Y(getTheX86_64Target());
|
||||
}
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user