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Fixed a bug in ARM disassembly where LDRSBT should have am3offset operand, not

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am2offset.  Modified the instruction table entry and added a new test case.

llvm-svn: 101415
This commit is contained in:
Johnny Chen 2010-04-15 23:12:47 +00:00
parent 55f814fdc4
commit 53225c4582
2 changed files with 4 additions and 1 deletions
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2
lib/Target/ARM/ARMInstrInfo.td
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@ -1232,7 +1232,7 @@ def LDRBT : AI2ldbpo<(outs GPR:$dst, GPR:$base_wb),
} }
def LDRSBT : AI3ldsbpo<(outs GPR:$dst, GPR:$base_wb), def LDRSBT : AI3ldsbpo<(outs GPR:$dst, GPR:$base_wb),
(ins GPR:$base,am2offset:$offset), LdMiscFrm, IIC_iLoadru, (ins GPR:$base,am3offset:$offset), LdMiscFrm, IIC_iLoadru,
"ldrsbt", "\t$dst, [$base], $offset", "$base = $base_wb", []> { "ldrsbt", "\t$dst, [$base], $offset", "$base = $base_wb", []> {
let Inst{21} = 1; // overwrite let Inst{21} = 1; // overwrite
} }

3
test/MC/Disassembler/arm-tests.txt
View File

@ -18,6 +18,9 @@
# CHECK: ldr r0, [r2], #15 # CHECK: ldr r0, [r2], #15
0x0f 0x00 0x92 0xe4 0x0f 0x00 0x92 0xe4
# CHECK: ldrsbtvs lr, [r2], -r9
0xd9 0xe9 0x32 0x60
# CHECK: lsls r0, r2, #31 # CHECK: lsls r0, r2, #31
0x82 0x0f 0xb0 0xe1 0x82 0x0f 0xb0 0xe1