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Post-index loads/stores in still need to print the post-indexed immediate, even if it's zero, to distinguish them from non-post-indexed instructions.
llvm-svn: 140420
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071eb7580a
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@ -1217,7 +1217,7 @@ def t2LDR_PRE : T2Ipreldst<0, 0b10, 1, 1, (outs GPR:$Rt, GPR:$Rn_wb),
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def t2LDR_POST : T2Ipostldst<0, 0b10, 1, 0, (outs GPR:$Rt, GPR:$Rn_wb),
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def t2LDR_POST : T2Ipostldst<0, 0b10, 1, 0, (outs GPR:$Rt, GPR:$Rn_wb),
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(ins addr_offset_none:$Rn, t2am_imm8_offset:$offset),
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(ins addr_offset_none:$Rn, t2am_imm8_offset:$offset),
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AddrModeT2_i8, IndexModePost, IIC_iLoad_iu,
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AddrModeT2_i8, IndexModePost, IIC_iLoad_iu,
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"ldr", "\t$Rt, $Rn, $offset", "$Rn = $Rn_wb", []>;
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"ldr", "\t$Rt, $Rn$offset", "$Rn = $Rn_wb", []>;
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def t2LDRB_PRE : T2Ipreldst<0, 0b00, 1, 1, (outs GPR:$Rt, GPR:$Rn_wb),
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def t2LDRB_PRE : T2Ipreldst<0, 0b00, 1, 1, (outs GPR:$Rt, GPR:$Rn_wb),
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(ins t2addrmode_imm8:$addr),
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(ins t2addrmode_imm8:$addr),
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@ -1229,7 +1229,7 @@ def t2LDRB_PRE : T2Ipreldst<0, 0b00, 1, 1, (outs GPR:$Rt, GPR:$Rn_wb),
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def t2LDRB_POST : T2Ipostldst<0, 0b00, 1, 0, (outs GPR:$Rt, GPR:$Rn_wb),
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def t2LDRB_POST : T2Ipostldst<0, 0b00, 1, 0, (outs GPR:$Rt, GPR:$Rn_wb),
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(ins addr_offset_none:$Rn, t2am_imm8_offset:$offset),
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(ins addr_offset_none:$Rn, t2am_imm8_offset:$offset),
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AddrModeT2_i8, IndexModePost, IIC_iLoad_bh_iu,
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AddrModeT2_i8, IndexModePost, IIC_iLoad_bh_iu,
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"ldrb", "\t$Rt, $Rn, $offset", "$Rn = $Rn_wb", []>;
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"ldrb", "\t$Rt, $Rn$offset", "$Rn = $Rn_wb", []>;
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def t2LDRH_PRE : T2Ipreldst<0, 0b01, 1, 1, (outs GPR:$Rt, GPR:$Rn_wb),
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def t2LDRH_PRE : T2Ipreldst<0, 0b01, 1, 1, (outs GPR:$Rt, GPR:$Rn_wb),
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(ins t2addrmode_imm8:$addr),
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(ins t2addrmode_imm8:$addr),
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@ -1241,7 +1241,7 @@ def t2LDRH_PRE : T2Ipreldst<0, 0b01, 1, 1, (outs GPR:$Rt, GPR:$Rn_wb),
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def t2LDRH_POST : T2Ipostldst<0, 0b01, 1, 0, (outs GPR:$Rt, GPR:$Rn_wb),
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def t2LDRH_POST : T2Ipostldst<0, 0b01, 1, 0, (outs GPR:$Rt, GPR:$Rn_wb),
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(ins addr_offset_none:$Rn, t2am_imm8_offset:$offset),
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(ins addr_offset_none:$Rn, t2am_imm8_offset:$offset),
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AddrModeT2_i8, IndexModePost, IIC_iLoad_bh_iu,
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AddrModeT2_i8, IndexModePost, IIC_iLoad_bh_iu,
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"ldrh", "\t$Rt, $Rn, $offset", "$Rn = $Rn_wb", []>;
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"ldrh", "\t$Rt, $Rn$offset", "$Rn = $Rn_wb", []>;
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def t2LDRSB_PRE : T2Ipreldst<1, 0b00, 1, 1, (outs GPR:$Rt, GPR:$Rn_wb),
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def t2LDRSB_PRE : T2Ipreldst<1, 0b00, 1, 1, (outs GPR:$Rt, GPR:$Rn_wb),
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(ins t2addrmode_imm8:$addr),
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(ins t2addrmode_imm8:$addr),
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@ -1253,7 +1253,7 @@ def t2LDRSB_PRE : T2Ipreldst<1, 0b00, 1, 1, (outs GPR:$Rt, GPR:$Rn_wb),
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def t2LDRSB_POST : T2Ipostldst<1, 0b00, 1, 0, (outs GPR:$Rt, GPR:$Rn_wb),
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def t2LDRSB_POST : T2Ipostldst<1, 0b00, 1, 0, (outs GPR:$Rt, GPR:$Rn_wb),
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(ins addr_offset_none:$Rn, t2am_imm8_offset:$offset),
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(ins addr_offset_none:$Rn, t2am_imm8_offset:$offset),
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AddrModeT2_i8, IndexModePost, IIC_iLoad_bh_iu,
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AddrModeT2_i8, IndexModePost, IIC_iLoad_bh_iu,
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"ldrsb", "\t$Rt, $Rn, $offset", "$Rn = $Rn_wb", []>;
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"ldrsb", "\t$Rt, $Rn$offset", "$Rn = $Rn_wb", []>;
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def t2LDRSH_PRE : T2Ipreldst<1, 0b01, 1, 1, (outs GPR:$Rt, GPR:$Rn_wb),
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def t2LDRSH_PRE : T2Ipreldst<1, 0b01, 1, 1, (outs GPR:$Rt, GPR:$Rn_wb),
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(ins t2addrmode_imm8:$addr),
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(ins t2addrmode_imm8:$addr),
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@ -1265,7 +1265,7 @@ def t2LDRSH_PRE : T2Ipreldst<1, 0b01, 1, 1, (outs GPR:$Rt, GPR:$Rn_wb),
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def t2LDRSH_POST : T2Ipostldst<1, 0b01, 1, 0, (outs GPR:$Rt, GPR:$Rn_wb),
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def t2LDRSH_POST : T2Ipostldst<1, 0b01, 1, 0, (outs GPR:$Rt, GPR:$Rn_wb),
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(ins addr_offset_none:$Rn, t2am_imm8_offset:$offset),
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(ins addr_offset_none:$Rn, t2am_imm8_offset:$offset),
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AddrModeT2_i8, IndexModePost, IIC_iLoad_bh_iu,
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AddrModeT2_i8, IndexModePost, IIC_iLoad_bh_iu,
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"ldrsh", "\t$Rt, $Rn, $offset", "$Rn = $Rn_wb", []>;
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"ldrsh", "\t$Rt, $Rn$offset", "$Rn = $Rn_wb", []>;
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} // mayLoad = 1, neverHasSideEffects = 1
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} // mayLoad = 1, neverHasSideEffects = 1
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// LDRT, LDRBT, LDRHT, LDRSBT, LDRSHT all have offset mode (PUW=0b110).
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// LDRT, LDRBT, LDRHT, LDRSBT, LDRSHT all have offset mode (PUW=0b110).
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@ -1336,7 +1336,7 @@ def t2STR_POST : T2Ipostldst<0, 0b10, 0, 0, (outs GPRnopc:$Rn_wb),
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(ins rGPR:$Rt, addr_offset_none:$Rn,
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(ins rGPR:$Rt, addr_offset_none:$Rn,
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t2am_imm8_offset:$offset),
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t2am_imm8_offset:$offset),
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AddrModeT2_i8, IndexModePost, IIC_iStore_iu,
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AddrModeT2_i8, IndexModePost, IIC_iStore_iu,
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"str", "\t$Rt, $Rn, $offset",
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"str", "\t$Rt, $Rn$offset",
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"$Rn = $Rn_wb,@earlyclobber $Rn_wb",
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"$Rn = $Rn_wb,@earlyclobber $Rn_wb",
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[(set GPRnopc:$Rn_wb,
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[(set GPRnopc:$Rn_wb,
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(post_store rGPR:$Rt, addr_offset_none:$Rn,
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(post_store rGPR:$Rt, addr_offset_none:$Rn,
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@ -1346,7 +1346,7 @@ def t2STRH_POST : T2Ipostldst<0, 0b01, 0, 0, (outs GPRnopc:$Rn_wb),
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(ins rGPR:$Rt, addr_offset_none:$Rn,
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(ins rGPR:$Rt, addr_offset_none:$Rn,
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t2am_imm8_offset:$offset),
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t2am_imm8_offset:$offset),
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AddrModeT2_i8, IndexModePost, IIC_iStore_bh_iu,
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AddrModeT2_i8, IndexModePost, IIC_iStore_bh_iu,
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"strh", "\t$Rt, $Rn, $offset",
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"strh", "\t$Rt, $Rn$offset",
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"$Rn = $Rn_wb,@earlyclobber $Rn_wb",
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"$Rn = $Rn_wb,@earlyclobber $Rn_wb",
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[(set GPRnopc:$Rn_wb,
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[(set GPRnopc:$Rn_wb,
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(post_truncsti16 rGPR:$Rt, addr_offset_none:$Rn,
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(post_truncsti16 rGPR:$Rt, addr_offset_none:$Rn,
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@ -1356,7 +1356,7 @@ def t2STRB_POST : T2Ipostldst<0, 0b00, 0, 0, (outs GPRnopc:$Rn_wb),
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(ins rGPR:$Rt, addr_offset_none:$Rn,
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(ins rGPR:$Rt, addr_offset_none:$Rn,
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t2am_imm8_offset:$offset),
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t2am_imm8_offset:$offset),
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AddrModeT2_i8, IndexModePost, IIC_iStore_bh_iu,
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AddrModeT2_i8, IndexModePost, IIC_iStore_bh_iu,
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"strb", "\t$Rt, $Rn, $offset",
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"strb", "\t$Rt, $Rn$offset",
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"$Rn = $Rn_wb,@earlyclobber $Rn_wb",
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"$Rn = $Rn_wb,@earlyclobber $Rn_wb",
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[(set GPRnopc:$Rn_wb,
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[(set GPRnopc:$Rn_wb,
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(post_truncsti8 rGPR:$Rt, addr_offset_none:$Rn,
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(post_truncsti8 rGPR:$Rt, addr_offset_none:$Rn,
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@ -874,9 +874,9 @@ void ARMInstPrinter::printT2AddrModeImm8OffsetOperand(const MCInst *MI,
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int32_t OffImm = (int32_t)MO1.getImm();
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int32_t OffImm = (int32_t)MO1.getImm();
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// Don't print +0.
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// Don't print +0.
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if (OffImm < 0)
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if (OffImm < 0)
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O << "#-" << -OffImm;
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O << ", #-" << -OffImm;
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else if (OffImm > 0)
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else
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O << "#" << OffImm;
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O << ", #" << OffImm;
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}
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}
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void ARMInstPrinter::printT2AddrModeImm8s4OffsetOperand(const MCInst *MI,
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void ARMInstPrinter::printT2AddrModeImm8s4OffsetOperand(const MCInst *MI,
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@ -1779,6 +1779,13 @@
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0x20 0xf3 0x1d 0x09
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0x20 0xf3 0x1d 0x09
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#------------------------------------------------------------------------------
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# STR (immediate)
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#------------------------------------------------------------------------------
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# CHECK: str r10, [r11], #0
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0x4b 0xf8 0x00 0xab
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#------------------------------------------------------------------------------
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#------------------------------------------------------------------------------
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# STRD (immediate)
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# STRD (immediate)
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#------------------------------------------------------------------------------
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#------------------------------------------------------------------------------
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