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https://github.com/RPCS3/llvm-mirror.git
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AMDGPU: Do basic folding of class intrinsic
This allows more of the OCML builtin library to be constant folded. llvm-svn: 280586
This commit is contained in:
Matt Arsenault
parent
7f6114dde5
commit
53e1580587
@ -2237,6 +2237,85 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
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break;
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}
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case Intrinsic::amdgcn_class: {
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enum {
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S_NAN = 1 << 0, // Signaling NaN
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Q_NAN = 1 << 1, // Quiet NaN
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N_INFINITY = 1 << 2, // Negative infinity
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N_NORMAL = 1 << 3, // Negative normal
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N_SUBNORMAL = 1 << 4, // Negative subnormal
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N_ZERO = 1 << 5, // Negative zero
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P_ZERO = 1 << 6, // Positive zero
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P_SUBNORMAL = 1 << 7, // Positive subnormal
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P_NORMAL = 1 << 8, // Positive normal
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P_INFINITY = 1 << 9 // Positive infinity
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};
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const uint32_t FullMask = S_NAN | Q_NAN | N_INFINITY | N_NORMAL |
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N_SUBNORMAL | N_ZERO | P_ZERO | P_SUBNORMAL | P_NORMAL | P_INFINITY;
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Value *Src0 = II->getArgOperand(0);
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Value *Src1 = II->getArgOperand(1);
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const ConstantInt *CMask = dyn_cast<ConstantInt>(Src1);
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if (!CMask) {
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if (isa<UndefValue>(Src0))
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return replaceInstUsesWith(*II, UndefValue::get(II->getType()));
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if (isa<UndefValue>(Src1))
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return replaceInstUsesWith(*II, ConstantInt::get(II->getType(), false));
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break;
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}
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uint32_t Mask = CMask->getZExtValue();
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// If all tests are made, it doesn't matter what the value is.
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if ((Mask & FullMask) == FullMask)
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return replaceInstUsesWith(*II, ConstantInt::get(II->getType(), true));
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if ((Mask & FullMask) == 0)
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return replaceInstUsesWith(*II, ConstantInt::get(II->getType(), false));
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if (Mask == (S_NAN | Q_NAN)) {
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// Equivalent of isnan. Replace with standard fcmp.
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Value *FCmp = Builder->CreateFCmpUNO(Src0, Src0);
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FCmp->takeName(II);
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return replaceInstUsesWith(*II, FCmp);
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}
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const ConstantFP *CVal = dyn_cast<ConstantFP>(Src0);
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if (!CVal) {
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if (isa<UndefValue>(Src0))
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return replaceInstUsesWith(*II, UndefValue::get(II->getType()));
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// Clamp mask to used bits
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if ((Mask & FullMask) != Mask) {
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CallInst *NewCall = Builder->CreateCall(II->getCalledFunction(),
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{ Src0, ConstantInt::get(Src1->getType(), Mask & FullMask) }
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);
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NewCall->takeName(II);
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return replaceInstUsesWith(*II, NewCall);
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}
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break;
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}
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const APFloat &Val = CVal->getValueAPF();
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bool Result =
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((Mask & S_NAN) && Val.isNaN() && Val.isSignaling()) ||
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((Mask & Q_NAN) && Val.isNaN() && !Val.isSignaling()) ||
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((Mask & N_INFINITY) && Val.isInfinity() && Val.isNegative()) ||
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((Mask & N_NORMAL) && Val.isNormal() && Val.isNegative()) ||
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((Mask & N_SUBNORMAL) && Val.isDenormal() && Val.isNegative()) ||
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((Mask & N_ZERO) && Val.isZero() && Val.isNegative()) ||
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((Mask & P_ZERO) && Val.isZero() && !Val.isNegative()) ||
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((Mask & P_SUBNORMAL) && Val.isDenormal() && !Val.isNegative()) ||
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((Mask & P_NORMAL) && Val.isNormal() && !Val.isNegative()) ||
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((Mask & P_INFINITY) && Val.isInfinity() && !Val.isNegative());
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return replaceInstUsesWith(*II, ConstantInt::get(II->getType(), Result));
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}
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case Intrinsic::stackrestore: {
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// If the save is right next to the restore, remove the restore. This can
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// happen when variable allocas are DCE'd.
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@ -362,3 +362,240 @@ define i32 @test_constant_fold_frexp_exp_f64_min_num() nounwind {
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ret i32 %val
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}
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; --------------------------------------------------------------------
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; llvm.amdgcn.class
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; --------------------------------------------------------------------
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declare i1 @llvm.amdgcn.class.f32(float, i32) nounwind readnone
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declare i1 @llvm.amdgcn.class.f64(double, i32) nounwind readnone
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; CHECK-LABEL: @test_class_undef_mask_f32(
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; CHECK: ret i1 false
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define i1 @test_class_undef_mask_f32(float %x) nounwind {
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%val = call i1 @llvm.amdgcn.class.f32(float %x, i32 undef)
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ret i1 %val
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}
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; CHECK-LABEL: @test_class_over_max_mask_f32(
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; CHECK: %val = call i1 @llvm.amdgcn.class.f32(float %x, i32 1)
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define i1 @test_class_over_max_mask_f32(float %x) nounwind {
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%val = call i1 @llvm.amdgcn.class.f32(float %x, i32 1025)
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ret i1 %val
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}
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; CHECK-LABEL: @test_class_no_mask_f32(
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; CHECK: ret i1 false
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define i1 @test_class_no_mask_f32(float %x) nounwind {
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%val = call i1 @llvm.amdgcn.class.f32(float %x, i32 0)
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ret i1 %val
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}
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; CHECK-LABEL: @test_class_full_mask_f32(
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; CHECK: ret i1 true
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define i1 @test_class_full_mask_f32(float %x) nounwind {
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%val = call i1 @llvm.amdgcn.class.f32(float %x, i32 1023)
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ret i1 %val
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}
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; CHECK-LABEL: @test_class_undef_no_mask_f32(
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; CHECK: ret i1 false
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define i1 @test_class_undef_no_mask_f32() nounwind {
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%val = call i1 @llvm.amdgcn.class.f32(float undef, i32 0)
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ret i1 %val
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}
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; CHECK-LABEL: @test_class_undef_full_mask_f32(
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; CHECK: ret i1 true
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define i1 @test_class_undef_full_mask_f32() nounwind {
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%val = call i1 @llvm.amdgcn.class.f32(float undef, i32 1023)
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ret i1 %val
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}
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; CHECK-LABEL: @test_class_undef_val_f32(
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; CHECK: ret i1 undef
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define i1 @test_class_undef_val_f32() nounwind {
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%val = call i1 @llvm.amdgcn.class.f32(float undef, i32 4)
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ret i1 %val
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}
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; CHECK-LABEL: @test_class_undef_undef_f32(
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; CHECK: ret i1 undef
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define i1 @test_class_undef_undef_f32() nounwind {
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%val = call i1 @llvm.amdgcn.class.f32(float undef, i32 undef)
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ret i1 %val
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}
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; CHECK-LABEL: @test_class_var_mask_f32(
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; CHECK: %val = call i1 @llvm.amdgcn.class.f32(float %x, i32 %mask)
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define i1 @test_class_var_mask_f32(float %x, i32 %mask) nounwind {
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%val = call i1 @llvm.amdgcn.class.f32(float %x, i32 %mask)
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ret i1 %val
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}
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; CHECK-LABEL: @test_class_isnan_f32(
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; CHECK: %val = fcmp uno float %x, 0.000000e+00
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define i1 @test_class_isnan_f32(float %x) nounwind {
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%val = call i1 @llvm.amdgcn.class.f32(float %x, i32 3)
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ret i1 %val
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}
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; CHECK-LABEL: @test_constant_class_snan_test_snan_f64(
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; CHECK: ret i1 true
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define i1 @test_constant_class_snan_test_snan_f64() nounwind {
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%val = call i1 @llvm.amdgcn.class.f64(double 0x7FF0000000000001, i32 1)
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ret i1 %val
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}
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; CHECK-LABEL: @test_constant_class_qnan_test_qnan_f64(
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; CHECK: ret i1 true
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define i1 @test_constant_class_qnan_test_qnan_f64() nounwind {
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%val = call i1 @llvm.amdgcn.class.f64(double 0x7FF8000000000000, i32 2)
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ret i1 %val
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}
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; CHECK-LABEL: @test_constant_class_qnan_test_snan_f64(
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; CHECK: ret i1 false
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define i1 @test_constant_class_qnan_test_snan_f64() nounwind {
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%val = call i1 @llvm.amdgcn.class.f64(double 0x7FF8000000000000, i32 1)
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ret i1 %val
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}
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; CHECK-LABEL: @test_constant_class_ninf_test_ninf_f64(
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; CHECK: ret i1 true
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define i1 @test_constant_class_ninf_test_ninf_f64() nounwind {
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%val = call i1 @llvm.amdgcn.class.f64(double 0xFFF0000000000000, i32 4)
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ret i1 %val
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}
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; CHECK-LABEL: @test_constant_class_pinf_test_ninf_f64(
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; CHECK: ret i1 false
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define i1 @test_constant_class_pinf_test_ninf_f64() nounwind {
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%val = call i1 @llvm.amdgcn.class.f64(double 0x7FF0000000000000, i32 4)
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ret i1 %val
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}
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; CHECK-LABEL: @test_constant_class_qnan_test_ninf_f64(
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; CHECK: ret i1 false
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define i1 @test_constant_class_qnan_test_ninf_f64() nounwind {
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%val = call i1 @llvm.amdgcn.class.f64(double 0x7FF8000000000000, i32 4)
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ret i1 %val
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}
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; CHECK-LABEL: @test_constant_class_snan_test_ninf_f64(
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; CHECK: ret i1 false
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define i1 @test_constant_class_snan_test_ninf_f64() nounwind {
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%val = call i1 @llvm.amdgcn.class.f64(double 0x7FF0000000000001, i32 4)
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ret i1 %val
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}
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; CHECK-LABEL: @test_constant_class_nnormal_test_nnormal_f64(
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; CHECK: ret i1 true
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define i1 @test_constant_class_nnormal_test_nnormal_f64() nounwind {
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%val = call i1 @llvm.amdgcn.class.f64(double -1.0, i32 8)
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ret i1 %val
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}
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; CHECK-LABEL: @test_constant_class_pnormal_test_nnormal_f64(
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; CHECK: ret i1 false
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define i1 @test_constant_class_pnormal_test_nnormal_f64() nounwind {
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%val = call i1 @llvm.amdgcn.class.f64(double 1.0, i32 8)
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ret i1 %val
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}
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; CHECK-LABEL: @test_constant_class_nsubnormal_test_nsubnormal_f64(
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; CHECK: ret i1 true
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define i1 @test_constant_class_nsubnormal_test_nsubnormal_f64() nounwind {
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%val = call i1 @llvm.amdgcn.class.f64(double 0x800fffffffffffff, i32 16)
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ret i1 %val
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}
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; CHECK-LABEL: @test_constant_class_psubnormal_test_nsubnormal_f64(
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; CHECK: ret i1 false
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define i1 @test_constant_class_psubnormal_test_nsubnormal_f64() nounwind {
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%val = call i1 @llvm.amdgcn.class.f64(double 0x000fffffffffffff, i32 16)
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ret i1 %val
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}
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; CHECK-LABEL: @test_constant_class_nzero_test_nzero_f64(
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; CHECK: ret i1 true
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define i1 @test_constant_class_nzero_test_nzero_f64() nounwind {
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%val = call i1 @llvm.amdgcn.class.f64(double -0.0, i32 32)
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ret i1 %val
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}
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; CHECK-LABEL: @test_constant_class_pzero_test_nzero_f64(
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; CHECK: ret i1 false
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define i1 @test_constant_class_pzero_test_nzero_f64() nounwind {
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%val = call i1 @llvm.amdgcn.class.f64(double 0.0, i32 32)
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ret i1 %val
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}
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; CHECK-LABEL: @test_constant_class_pzero_test_pzero_f64(
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; CHECK: ret i1 true
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define i1 @test_constant_class_pzero_test_pzero_f64() nounwind {
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%val = call i1 @llvm.amdgcn.class.f64(double 0.0, i32 64)
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ret i1 %val
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}
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; CHECK-LABEL: @test_constant_class_nzero_test_pzero_f64(
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; CHECK: ret i1 false
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define i1 @test_constant_class_nzero_test_pzero_f64() nounwind {
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%val = call i1 @llvm.amdgcn.class.f64(double -0.0, i32 64)
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ret i1 %val
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}
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; CHECK-LABEL: @test_constant_class_psubnormal_test_psubnormal_f64(
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; CHECK: ret i1 true
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define i1 @test_constant_class_psubnormal_test_psubnormal_f64() nounwind {
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%val = call i1 @llvm.amdgcn.class.f64(double 0x000fffffffffffff, i32 128)
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ret i1 %val
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}
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; CHECK-LABEL: @test_constant_class_nsubnormal_test_psubnormal_f64(
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; CHECK: ret i1 false
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define i1 @test_constant_class_nsubnormal_test_psubnormal_f64() nounwind {
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%val = call i1 @llvm.amdgcn.class.f64(double 0x800fffffffffffff, i32 128)
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ret i1 %val
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}
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; CHECK-LABEL: @test_constant_class_pnormal_test_pnormal_f64(
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; CHECK: ret i1 true
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define i1 @test_constant_class_pnormal_test_pnormal_f64() nounwind {
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%val = call i1 @llvm.amdgcn.class.f64(double 1.0, i32 256)
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ret i1 %val
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}
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; CHECK-LABEL: @test_constant_class_nnormal_test_pnormal_f64(
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; CHECK: ret i1 false
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define i1 @test_constant_class_nnormal_test_pnormal_f64() nounwind {
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%val = call i1 @llvm.amdgcn.class.f64(double -1.0, i32 256)
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ret i1 %val
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}
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; CHECK-LABEL: @test_constant_class_pinf_test_pinf_f64(
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; CHECK: ret i1 true
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define i1 @test_constant_class_pinf_test_pinf_f64() nounwind {
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%val = call i1 @llvm.amdgcn.class.f64(double 0x7FF0000000000000, i32 512)
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ret i1 %val
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}
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; CHECK-LABEL: @test_constant_class_ninf_test_pinf_f64(
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; CHECK: ret i1 false
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define i1 @test_constant_class_ninf_test_pinf_f64() nounwind {
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%val = call i1 @llvm.amdgcn.class.f64(double 0xFFF0000000000000, i32 512)
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ret i1 %val
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}
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; CHECK-LABEL: @test_constant_class_qnan_test_pinf_f64(
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; CHECK: ret i1 false
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define i1 @test_constant_class_qnan_test_pinf_f64() nounwind {
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%val = call i1 @llvm.amdgcn.class.f64(double 0x7FF8000000000000, i32 512)
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ret i1 %val
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}
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; CHECK-LABEL: @test_constant_class_snan_test_pinf_f64(
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; CHECK: ret i1 false
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define i1 @test_constant_class_snan_test_pinf_f64() nounwind {
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%val = call i1 @llvm.amdgcn.class.f64(double 0x7FF0000000000001, i32 512)
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ret i1 %val
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}
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