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[ARM][MachineOutliner] Fix costs model.
Fix candidates calls costs models allocation and prepare stack fixups handling. Differential Revision: https://reviews.llvm.org/D92933
This commit is contained in:
parent
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commit
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@ -5824,31 +5824,43 @@ outliner::OutlinedFunction ARMBaseInstrInfo::getOutliningCandidateInfo(
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else if (C.UsedInSequence.available(ARM::SP)) {
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else if (C.UsedInSequence.available(ARM::SP)) {
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NumBytesNoStackCalls += Costs.CallDefault;
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NumBytesNoStackCalls += Costs.CallDefault;
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C.setCallInfo(MachineOutlinerDefault, Costs.CallDefault);
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C.setCallInfo(MachineOutlinerDefault, Costs.CallDefault);
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SetCandidateCallInfo(MachineOutlinerDefault, Costs.CallDefault);
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CandidatesWithoutStackFixups.push_back(C);
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CandidatesWithoutStackFixups.push_back(C);
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} else
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}
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return outliner::OutlinedFunction();
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// If we outline this, we need to modify the stack. Pretend we don't
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// outline this by saving all of its bytes.
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else
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NumBytesNoStackCalls += SequenceSize;
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}
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}
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// Does every candidate's MBB contain a call? If so, then we might have a
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// If there are no places where we have to save LR, then note that we don't
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// call in the range.
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// have to update the stack. Otherwise, give every candidate the default
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if (FlagsSetInAll & MachineOutlinerMBBFlags::HasCalls) {
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// call type
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// check if the range contains a call. These require a save + restore of
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if (NumBytesNoStackCalls <=
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// the link register.
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RepeatedSequenceLocs.size() * Costs.CallDefault) {
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if (std::any_of(FirstCand.front(), FirstCand.back(),
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RepeatedSequenceLocs = CandidatesWithoutStackFixups;
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[](const MachineInstr &MI) { return MI.isCall(); }))
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FrameID = MachineOutlinerNoLRSave;
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NumBytesToCreateFrame += Costs.SaveRestoreLROnStack;
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} else
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SetCandidateCallInfo(MachineOutlinerDefault, Costs.CallDefault);
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}
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// Handle the last instruction separately. If it is tail call, then the
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// Does every candidate's MBB contain a call? If so, then we might have a
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// last instruction is a call, we don't want to save + restore in this
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// call in the range.
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// case. However, it could be possible that the last instruction is a
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if (FlagsSetInAll & MachineOutlinerMBBFlags::HasCalls) {
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// call without it being valid to tail call this sequence. We should
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// check if the range contains a call. These require a save + restore of
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// consider this as well.
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// the link register.
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else if (FrameID != MachineOutlinerThunk &&
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if (std::any_of(FirstCand.front(), FirstCand.back(),
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FrameID != MachineOutlinerTailCall && FirstCand.back()->isCall())
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[](const MachineInstr &MI) { return MI.isCall(); }))
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NumBytesToCreateFrame += Costs.SaveRestoreLROnStack;
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NumBytesToCreateFrame += Costs.SaveRestoreLROnStack;
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}
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RepeatedSequenceLocs = CandidatesWithoutStackFixups;
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// Handle the last instruction separately. If it is tail call, then the
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// last instruction is a call, we don't want to save + restore in this
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// case. However, it could be possible that the last instruction is a
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// call without it being valid to tail call this sequence. We should
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// consider this as well.
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else if (FrameID != MachineOutlinerThunk &&
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FrameID != MachineOutlinerTailCall && FirstCand.back()->isCall())
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NumBytesToCreateFrame += Costs.SaveRestoreLROnStack;
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}
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}
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return outliner::OutlinedFunction(RepeatedSequenceLocs, SequenceSize,
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return outliner::OutlinedFunction(RepeatedSequenceLocs, SequenceSize,
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@ -88,15 +88,15 @@ body: |
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; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 8
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; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 8
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; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4
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; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4
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; CHECK: frame-setup CFI_INSTRUCTION offset $r7, -8
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; CHECK: frame-setup CFI_INSTRUCTION offset $r7, -8
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; CHECK: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_3
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; CHECK: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_4
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; CHECK: bb.1:
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; CHECK: bb.1:
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; CHECK: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_3
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; CHECK: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_4
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; CHECK: bb.2:
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; CHECK: bb.2:
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; CHECK: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_3
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; CHECK: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_4
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; CHECK: bb.3:
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; CHECK: bb.3:
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; CHECK: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_3
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; CHECK: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_4
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; CHECK: bb.4:
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; CHECK: bb.4:
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; CHECK: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_3
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; CHECK: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_4
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; CHECK: bb.5:
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; CHECK: bb.5:
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; CHECK: $sp = frame-destroy t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r7, def $pc
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; CHECK: $sp = frame-destroy t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r7, def $pc
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bb.0:
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bb.0:
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@ -139,12 +139,14 @@ body: |
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; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 8
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; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 8
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; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4
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; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4
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; CHECK: frame-setup CFI_INSTRUCTION offset $r4, -8
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; CHECK: frame-setup CFI_INSTRUCTION offset $r4, -8
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; CHECK: BL @OUTLINED_FUNCTION_2
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; CHECK: BL @OUTLINED_FUNCTION_1
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; CHECK: bb.1:
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; CHECK: bb.1:
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; CHECK: BL @OUTLINED_FUNCTION_2
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; CHECK: BL @OUTLINED_FUNCTION_1
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; CHECK: bb.2:
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; CHECK: bb.2:
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; CHECK: BL @OUTLINED_FUNCTION_2
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; CHECK: BL @OUTLINED_FUNCTION_1
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; CHECK: bb.3:
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; CHECK: bb.3:
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; CHECK: BL @OUTLINED_FUNCTION_1
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; CHECK: bb.4:
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; CHECK: $sp = frame-destroy LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r4, def $lr
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; CHECK: $sp = frame-destroy LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r4, def $lr
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; CHECK: BX_RET 14 /* CC::al */, $noreg
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; CHECK: BX_RET 14 /* CC::al */, $noreg
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bb.0:
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bb.0:
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@ -172,6 +174,14 @@ body: |
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$r4 = MOVi 2, 14, $noreg, $noreg
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$r4 = MOVi 2, 14, $noreg, $noreg
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BL @bar, implicit-def dead $lr, implicit $sp
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BL @bar, implicit-def dead $lr, implicit $sp
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bb.3:
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bb.3:
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BL @bar, implicit-def dead $lr, implicit $sp
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$r0 = MOVi 2, 14, $noreg, $noreg
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$r1 = MOVi 2, 14, $noreg, $noreg
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$r2 = MOVi 2, 14, $noreg, $noreg
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$r3 = MOVi 2, 14, $noreg, $noreg
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$r4 = MOVi 2, 14, $noreg, $noreg
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BL @bar, implicit-def dead $lr, implicit $sp
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bb.4:
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BX_RET 14, $noreg
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BX_RET 14, $noreg
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...
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...
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---
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---
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@ -186,12 +196,14 @@ body: |
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; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 8
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; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 8
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; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4
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; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4
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; CHECK: frame-setup CFI_INSTRUCTION offset $r7, -8
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; CHECK: frame-setup CFI_INSTRUCTION offset $r7, -8
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; CHECK: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_4
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; CHECK: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_3
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; CHECK: bb.1:
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; CHECK: bb.1:
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; CHECK: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_4
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; CHECK: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_3
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; CHECK: bb.2:
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; CHECK: bb.2:
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; CHECK: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_4
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; CHECK: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_3
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; CHECK: bb.3:
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; CHECK: bb.3:
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; CHECK: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_3
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; CHECK: bb.4:
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; CHECK: $sp = frame-destroy t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r7, def $pc
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; CHECK: $sp = frame-destroy t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r7, def $pc
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bb.0:
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bb.0:
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tBL 14, $noreg, @bar, implicit-def dead $lr, implicit $sp
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tBL 14, $noreg, @bar, implicit-def dead $lr, implicit $sp
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@ -212,6 +224,12 @@ body: |
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$r2 = t2MOVi 2, 14, $noreg, $noreg
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$r2 = t2MOVi 2, 14, $noreg, $noreg
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tBL 14, $noreg, @bar, implicit-def dead $lr, implicit $sp
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tBL 14, $noreg, @bar, implicit-def dead $lr, implicit $sp
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bb.3:
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bb.3:
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tBL 14, $noreg, @bar, implicit-def dead $lr, implicit $sp
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$r0 = t2MOVi 2, 14, $noreg, $noreg
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$r1 = t2MOVi 2, 14, $noreg, $noreg
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$r2 = t2MOVi 2, 14, $noreg, $noreg
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tBL 14, $noreg, @bar, implicit-def dead $lr, implicit $sp
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bb.4:
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tBX_RET 14, $noreg
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tBX_RET 14, $noreg
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...
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...
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---
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---
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@ -227,19 +245,19 @@ body: |
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; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4
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; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4
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; CHECK: frame-setup CFI_INSTRUCTION offset $r4, -8
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; CHECK: frame-setup CFI_INSTRUCTION offset $r4, -8
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; CHECK: BL @"\01mcount", csr_aapcs, implicit-def dead $lr, implicit $sp
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; CHECK: BL @"\01mcount", csr_aapcs, implicit-def dead $lr, implicit $sp
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; CHECK: BL @OUTLINED_FUNCTION_1
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; CHECK: BL @OUTLINED_FUNCTION_2
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; CHECK: bb.1:
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; CHECK: bb.1:
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; CHECK: BL @"\01mcount", csr_aapcs, implicit-def dead $lr, implicit $sp
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; CHECK: BL @"\01mcount", csr_aapcs, implicit-def dead $lr, implicit $sp
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; CHECK: BL @OUTLINED_FUNCTION_1
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; CHECK: BL @OUTLINED_FUNCTION_2
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; CHECK: bb.2:
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; CHECK: bb.2:
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; CHECK: BL @"\01mcount", csr_aapcs, implicit-def dead $lr, implicit $sp
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; CHECK: BL @"\01mcount", csr_aapcs, implicit-def dead $lr, implicit $sp
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; CHECK: BL @OUTLINED_FUNCTION_1
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; CHECK: BL @OUTLINED_FUNCTION_2
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; CHECK: bb.3:
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; CHECK: bb.3:
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; CHECK: BL @"\01mcount", csr_aapcs, implicit-def dead $lr, implicit $sp
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; CHECK: BL @"\01mcount", csr_aapcs, implicit-def dead $lr, implicit $sp
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; CHECK: BL @OUTLINED_FUNCTION_1
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; CHECK: BL @OUTLINED_FUNCTION_2
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; CHECK: bb.4:
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; CHECK: bb.4:
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; CHECK: BL @"\01mcount", csr_aapcs, implicit-def dead $lr, implicit $sp
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; CHECK: BL @"\01mcount", csr_aapcs, implicit-def dead $lr, implicit $sp
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; CHECK: BL @OUTLINED_FUNCTION_1
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; CHECK: BL @OUTLINED_FUNCTION_2
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; CHECK: bb.5:
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; CHECK: bb.5:
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; CHECK: $sp = frame-destroy LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r4, def $lr
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; CHECK: $sp = frame-destroy LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r4, def $lr
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; CHECK: BX_RET 14 /* CC::al */, $noreg
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; CHECK: BX_RET 14 /* CC::al */, $noreg
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@ -307,16 +325,6 @@ body: |
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; CHECK-LABEL: name: OUTLINED_FUNCTION_1
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; CHECK-LABEL: name: OUTLINED_FUNCTION_1
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; CHECK: bb.0:
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; CHECK: bb.0:
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; CHECK: liveins: $r11, $r10, $r9, $r8, $r7, $r6, $r5, $d15, $d14, $d13, $d12, $d11, $d10, $d9, $d8
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; CHECK: $r0 = MOVi 3, 14 /* CC::al */, $noreg, $noreg
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; CHECK: $r1 = MOVi 3, 14 /* CC::al */, $noreg, $noreg
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; CHECK: $r2 = MOVi 3, 14 /* CC::al */, $noreg, $noreg
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; CHECK: $r3 = MOVi 3, 14 /* CC::al */, $noreg, $noreg
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; CHECK: $r4 = MOVi 3, 14 /* CC::al */, $noreg, $noreg
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; CHECK: MOVPCLR 14 /* CC::al */, $noreg
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; CHECK-LABEL: name: OUTLINED_FUNCTION_2
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; CHECK: bb.0:
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; CHECK: liveins: $r11, $r10, $r9, $r8, $r7, $r6, $r5, $d15, $d14, $d13, $d12, $d11, $d10, $d9, $d8, $lr
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; CHECK: liveins: $r11, $r10, $r9, $r8, $r7, $r6, $r5, $d15, $d14, $d13, $d12, $d11, $d10, $d9, $d8, $lr
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; CHECK: early-clobber $sp = STR_PRE_IMM killed $lr, $sp, -8, 14 /* CC::al */, $noreg
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; CHECK: early-clobber $sp = STR_PRE_IMM killed $lr, $sp, -8, 14 /* CC::al */, $noreg
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; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 8
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; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 8
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@ -330,20 +338,17 @@ body: |
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; CHECK: $lr, $sp = LDR_POST_IMM $sp, $noreg, 8, 14 /* CC::al */, $noreg
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; CHECK: $lr, $sp = LDR_POST_IMM $sp, $noreg, 8, 14 /* CC::al */, $noreg
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; CHECK: TAILJMPd @bar, implicit $sp
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; CHECK: TAILJMPd @bar, implicit $sp
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; CHECK-LABEL: name: OUTLINED_FUNCTION_3
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; CHECK-LABEL: name: OUTLINED_FUNCTION_2
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; CHECK: bb.0:
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; CHECK: bb.0:
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; CHECK: liveins: $r11, $r10, $r9, $r8, $r6, $r5, $r4, $d15, $d14, $d13, $d12, $d11, $d10, $d9, $d8, $lr
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; CHECK: liveins: $r11, $r10, $r9, $r8, $r7, $r6, $r5, $d15, $d14, $d13, $d12, $d11, $d10, $d9, $d8
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; CHECK: early-clobber $sp = t2STR_PRE killed $lr, $sp, -8, 14 /* CC::al */, $noreg
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; CHECK: $r0 = MOVi 3, 14 /* CC::al */, $noreg, $noreg
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; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 8
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; CHECK: $r1 = MOVi 3, 14 /* CC::al */, $noreg, $noreg
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; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -8
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; CHECK: $r2 = MOVi 3, 14 /* CC::al */, $noreg, $noreg
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; CHECK: tBL 14 /* CC::al */, $noreg, @bar, implicit-def dead $lr, implicit $sp
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; CHECK: $r3 = MOVi 3, 14 /* CC::al */, $noreg, $noreg
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; CHECK: $r0 = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg
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; CHECK: $r4 = MOVi 3, 14 /* CC::al */, $noreg, $noreg
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; CHECK: $r1 = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg
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; CHECK: MOVPCLR 14 /* CC::al */, $noreg
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; CHECK: $r2 = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg
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; CHECK: $lr, $sp = t2LDR_POST $sp, 8, 14 /* CC::al */, $noreg
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; CHECK: tBX_RET 14 /* CC::al */, $noreg
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; CHECK-LABEL: name: OUTLINED_FUNCTION_4
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; CHECK-LABEL: name: OUTLINED_FUNCTION_3
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; CHECK: bb.0:
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; CHECK: bb.0:
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; CHECK: liveins: $r11, $r10, $r9, $r8, $r6, $r5, $r4, $d15, $d14, $d13, $d12, $d11, $d10, $d9, $d8, $lr
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; CHECK: liveins: $r11, $r10, $r9, $r8, $r6, $r5, $r4, $d15, $d14, $d13, $d12, $d11, $d10, $d9, $d8, $lr
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; CHECK: early-clobber $sp = t2STR_PRE killed $lr, $sp, -8, 14 /* CC::al */, $noreg
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; CHECK: early-clobber $sp = t2STR_PRE killed $lr, $sp, -8, 14 /* CC::al */, $noreg
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@ -356,5 +361,18 @@ body: |
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; CHECK: $lr, $sp = t2LDR_POST $sp, 8, 14 /* CC::al */, $noreg
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; CHECK: $lr, $sp = t2LDR_POST $sp, 8, 14 /* CC::al */, $noreg
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; CHECK: tTAILJMPdND @bar, 14 /* CC::al */, $noreg, implicit $sp
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; CHECK: tTAILJMPdND @bar, 14 /* CC::al */, $noreg, implicit $sp
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; CHECK-LABEL: name: OUTLINED_FUNCTION_4
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; CHECK: bb.0:
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; CHECK: liveins: $r11, $r10, $r9, $r8, $r6, $r5, $r4, $d15, $d14, $d13, $d12, $d11, $d10, $d9, $d8, $lr
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; CHECK: early-clobber $sp = t2STR_PRE killed $lr, $sp, -8, 14 /* CC::al */, $noreg
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; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 8
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; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -8
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; CHECK: tBL 14 /* CC::al */, $noreg, @bar, implicit-def dead $lr, implicit $sp
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; CHECK: $r0 = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg
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; CHECK: $r1 = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg
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; CHECK: $r2 = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg
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; CHECK: $lr, $sp = t2LDR_POST $sp, 8, 14 /* CC::al */, $noreg
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; CHECK: tBX_RET 14 /* CC::al */, $noreg
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58
test/CodeGen/ARM/machine-outliner-stack-use.mir
Normal file
58
test/CodeGen/ARM/machine-outliner-stack-use.mir
Normal file
@ -0,0 +1,58 @@
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# RUN: llc -mtriple=arm-- -run-pass=machine-outliner -verify-machineinstrs \
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# RUN: %s -o - | FileCheck %s
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--- |
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define void @stack_use_no_lr_save_1() #0 { ret void }
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|
define void @stack_use_no_lr_save_2() #0 { ret void }
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||||||
|
|
||||||
|
attributes #0 = { minsize optsize }
|
||||||
|
...
|
||||||
|
---
|
||||||
|
|
||||||
|
name: stack_use_no_lr_save_1
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||||||
|
tracksRegLiveness: true
|
||||||
|
body: |
|
||||||
|
bb.0:
|
||||||
|
; CHECK-LABEL: name: stack_use_no_lr_save_1
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||||||
|
; CHECK: BL @OUTLINED_FUNCTION_0
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||||||
|
$r0 = MOVi 1, 14, $noreg, $noreg
|
||||||
|
$r0 = MOVi 1, 14, $noreg, $noreg
|
||||||
|
$r0 = LDRi12 $sp, 0, 14, $noreg
|
||||||
|
$r0 = LDRi12 $sp, 0, 14, $noreg
|
||||||
|
$r0 = LDRi12 $sp, 0, 14, $noreg
|
||||||
|
$r0 = MOVi 1, 14, $noreg, $noreg
|
||||||
|
$r0 = LDRi12 $sp, 0, 14, $noreg
|
||||||
|
$r0 = MOVi 1, 14, $noreg, $noreg
|
||||||
|
bb.1:
|
||||||
|
liveins: $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11
|
||||||
|
BX_RET 14, $noreg
|
||||||
|
...
|
||||||
|
---
|
||||||
|
|
||||||
|
name: stack_use_no_lr_save_2
|
||||||
|
tracksRegLiveness: true
|
||||||
|
body: |
|
||||||
|
bb.0:
|
||||||
|
; CHECK-LABEL: name: stack_use_no_lr_save_2
|
||||||
|
; CHECK: BL @OUTLINED_FUNCTION_0
|
||||||
|
$r0 = MOVi 1, 14, $noreg, $noreg
|
||||||
|
$r0 = MOVi 1, 14, $noreg, $noreg
|
||||||
|
$r0 = LDRi12 $sp, 0, 14, $noreg
|
||||||
|
$r0 = LDRi12 $sp, 0, 14, $noreg
|
||||||
|
$r0 = LDRi12 $sp, 0, 14, $noreg
|
||||||
|
$r0 = MOVi 1, 14, $noreg, $noreg
|
||||||
|
$r0 = LDRi12 $sp, 0, 14, $noreg
|
||||||
|
$r0 = MOVi 1, 14, $noreg, $noreg
|
||||||
|
bb.1:
|
||||||
|
BX_RET 14, $noreg
|
||||||
|
|
||||||
|
;CHECK: name: OUTLINED_FUNCTION_0
|
||||||
|
;CHECK: $r0 = MOVi 1, 14 /* CC::al */, $noreg, $noreg
|
||||||
|
;CHECK-NEXT: $r0 = MOVi 1, 14 /* CC::al */, $noreg, $noreg
|
||||||
|
;CHECK-NEXT: $r0 = LDRi12 $sp, 0, 14 /* CC::al */, $noreg
|
||||||
|
;CHECK-NEXT: $r0 = LDRi12 $sp, 0, 14 /* CC::al */, $noreg
|
||||||
|
;CHECK-NEXT: $r0 = LDRi12 $sp, 0, 14 /* CC::al */, $noreg
|
||||||
|
;CHECK-NEXT: $r0 = MOVi 1, 14 /* CC::al */, $noreg, $noreg
|
||||||
|
;CHECK-NEXT: $r0 = LDRi12 $sp, 0, 14 /* CC::al */, $noreg
|
||||||
|
;CHECK-NEXT: $r0 = MOVi 1, 14 /* CC::al */, $noreg, $noreg
|
||||||
|
;CHECK-NEXT: MOVPCLR 14 /* CC::al */, $noreg
|
Loading…
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Reference in New Issue
Block a user