1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 19:12:56 +02:00

Do not assert when trying to add a meta data operand with

MachineInstr::addOperand().

llvm-svn: 192707
This commit is contained in:
Pekka Jaaskelainen 2013-10-15 14:18:10 +00:00
parent 21c7c7cd9b
commit 54b97f5710

View File

@ -647,11 +647,12 @@ void MachineInstr::addOperand(MachineFunction &MF, const MachineOperand &Op) {
}
}
bool isMetaDataOp = Op.getType() == MachineOperand::MO_Metadata;
// OpNo now points as the desired insertion point. Unless this is a variadic
// instruction, only implicit regs are allowed beyond MCID->getNumOperands().
// RegMask operands go between the explicit and implicit operands.
assert((isImpReg || Op.isRegMask() || MCID->isVariadic() ||
OpNo < MCID->getNumOperands()) &&
OpNo < MCID->getNumOperands() || isMetaDataOp) &&
"Trying to add an operand to a machine instr that is already done!");
MachineRegisterInfo *MRI = getRegInfo();