diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 0547844bb9e..53abf340ad0 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -1355,7 +1355,9 @@ def LDM_UPD : AXI4ld<(outs GPR:$wb), (ins addrmode4:$addr, pred:$p,
                                       reglist:$dsts, variable_ops),
                      IndexModeUpd, LdStMulFrm, IIC_iLoadm,
                      "ldm${addr:submode}${p}\t$addr!, $dsts",
-                     "$addr.addr = $wb", []>;
+                     "$addr.addr = $wb", []> {
+  let Inst{21} = 1; // wback
+}
 } // mayLoad, hasExtraDefRegAllocReq
 
 let mayStore = 1, hasExtraSrcRegAllocReq = 1 in {
@@ -1368,7 +1370,9 @@ def STM_UPD : AXI4st<(outs GPR:$wb), (ins addrmode4:$addr, pred:$p,
                                       reglist:$srcs, variable_ops),
                      IndexModeUpd, LdStMulFrm, IIC_iStorem,
                      "stm${addr:submode}${p}\t$addr!, $srcs",
-                     "$addr.addr = $wb", []>;
+                     "$addr.addr = $wb", []> {
+  let Inst{21} = 1; // wback
+}
 } // mayStore, hasExtraSrcRegAllocReq
 
 //===----------------------------------------------------------------------===//
diff --git a/lib/Target/ARM/ARMInstrVFP.td b/lib/Target/ARM/ARMInstrVFP.td
index 1d5acc1d4d5..68dff86ef68 100644
--- a/lib/Target/ARM/ARMInstrVFP.td
+++ b/lib/Target/ARM/ARMInstrVFP.td
@@ -96,6 +96,7 @@ def VLDMD_UPD : AXDI5<(outs GPR:$wb), (ins addrmode5:$addr, pred:$p,
                       IndexModeUpd, IIC_fpLoadm,
                       "vldm${addr:submode}${p}\t${addr:base}!, $dsts",
                       "$addr.base = $wb", []> {
+  let Inst{21} = 1; // wback
   let Inst{20} = 1;
 }
 
@@ -104,6 +105,7 @@ def VLDMS_UPD : AXSI5<(outs GPR:$wb), (ins addrmode5:$addr, pred:$p,
                       IndexModeUpd, IIC_fpLoadm, 
                       "vldm${addr:submode}${p}\t${addr:base}!, $dsts",
                       "$addr.base = $wb", []> {
+  let Inst{21} = 1; // wback
   let Inst{20} = 1;
 }
 } // mayLoad, hasExtraDefRegAllocReq
@@ -126,6 +128,7 @@ def VSTMD_UPD : AXDI5<(outs GPR:$wb), (ins addrmode5:$addr, pred:$p,
                       IndexModeUpd, IIC_fpStorem,
                       "vstm${addr:submode}${p}\t${addr:base}!, $srcs",
                       "$addr.base = $wb", []> {
+  let Inst{21} = 1; // wback
   let Inst{20} = 0;
 }
 
@@ -134,6 +137,7 @@ def VSTMS_UPD : AXSI5<(outs GPR:$wb), (ins addrmode5:$addr, pred:$p,
                       IndexModeUpd, IIC_fpStorem,
                       "vstm${addr:submode}${p}\t${addr:base}!, $srcs",
                       "$addr.base = $wb", []> {
+  let Inst{21} = 1; // wback
   let Inst{20} = 0;
 }
 } // mayStore, hasExtraSrcRegAllocReq