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Handled unaligned load/stores properly in Mips16
Patch by Reed Kotler. llvm-svn: 163956
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5e4c29b751
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5540fca519
@ -161,8 +161,10 @@ MipsTargetLowering(MipsTargetMachine &TM)
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setOperationAction(ISD::FCOPYSIGN, MVT::f64, Custom);
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setOperationAction(ISD::MEMBARRIER, MVT::Other, Custom);
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setOperationAction(ISD::ATOMIC_FENCE, MVT::Other, Custom);
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setOperationAction(ISD::LOAD, MVT::i32, Custom);
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setOperationAction(ISD::STORE, MVT::i32, Custom);
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if (!Subtarget->inMips16Mode()) {
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setOperationAction(ISD::LOAD, MVT::i32, Custom);
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setOperationAction(ISD::STORE, MVT::i32, Custom);
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}
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if (!TM.Options.NoNaNsFPMath) {
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setOperationAction(ISD::FABS, MVT::f32, Custom);
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@ -309,6 +311,9 @@ MipsTargetLowering(MipsTargetMachine &TM)
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bool MipsTargetLowering::allowsUnalignedMemoryAccesses(EVT VT) const {
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MVT::SimpleValueType SVT = VT.getSimpleVT().SimpleTy;
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if (Subtarget->inMips16Mode())
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return false;
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switch (SVT) {
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case MVT::i64:
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case MVT::i32:
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15
test/CodeGen/Mips/ul1.ll
Normal file
15
test/CodeGen/Mips/ul1.ll
Normal file
@ -0,0 +1,15 @@
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; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
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%struct.ua = type <{ i16, i32 }>
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@foo = common global %struct.ua zeroinitializer, align 1
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define i32 @main() nounwind {
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entry:
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store i32 10, i32* getelementptr inbounds (%struct.ua* @foo, i32 0, i32 1), align 1
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; 16: sb ${{[0-9]+}}, {{[0-9]+}}(${{[0-9]+}})
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; 16: sb ${{[0-9]+}}, {{[0-9]+}}(${{[0-9]+}})
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; 16: sb ${{[0-9]+}}, {{[0-9]+}}(${{[0-9]+}})
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; 16: sb ${{[0-9]+}}, {{[0-9]+}}(${{[0-9]+}})
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ret i32 0
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}
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