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Added early exit.
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@ -288,6 +288,12 @@ bool AMDGPUPostLegalizerCombinerHelper::matchClampI64ToI16(
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m_Reg(MatchInfo.Origin)))) {
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const auto Cmp1 = MatchInfo.Cmp1;
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const auto Cmp2 = MatchInfo.Cmp2;
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const auto Diff = std::abs(Cmp2 - Cmp1);
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// we don't need to clamp here.
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if (Diff == 0 || Diff == 1) {
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return false;
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}
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const int64_t Min = std::numeric_limits<int16_t>::min();
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const int64_t Max = std::numeric_limits<int16_t>::max();
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@ -329,7 +335,10 @@ void AMDGPUPostLegalizerCombinerHelper::applyClampI64ToI16(
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constexpr unsigned int CvtOpcode = AMDGPU::V_CVT_PK_I16_I32_e64;
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assert(MI.getOpcode() != CvtOpcode);
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Register CvtDst = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
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const auto REG_CLASS = &AMDGPU::VGPR_32RegClass;
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Register CvtDst = MRI.createVirtualRegister(REG_CLASS);
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MRI.setType(CvtDst, S32);
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auto CvtPk = B.buildInstr(CvtOpcode);
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CvtPk.addDef(CvtDst);
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@ -340,13 +349,16 @@ void AMDGPUPostLegalizerCombinerHelper::applyClampI64ToI16(
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auto min = std::min(MatchInfo.Cmp1, MatchInfo.Cmp2);
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auto max = std::max(MatchInfo.Cmp1, MatchInfo.Cmp2);
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Register MinBoundaryDst = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
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Register MinBoundaryDst = MRI.createVirtualRegister(REG_CLASS);
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MRI.setType(MinBoundaryDst, S32);
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B.buildConstant(MinBoundaryDst, min);
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Register MaxBoundaryDst = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
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Register MaxBoundaryDst = MRI.createVirtualRegister(REG_CLASS);
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MRI.setType(MaxBoundaryDst, S32);
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B.buildConstant(MaxBoundaryDst, max);
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Register MedDst = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
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Register MedDst = MRI.createVirtualRegister(REG_CLASS);
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MRI.setType(MedDst, S32);
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auto Med = B.buildInstr(AMDGPU::V_MED3_I32);
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Med.addDef(MedDst);
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