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[AMDGPU] Add implicit vcc_lo on S_CBRANCH_VCCNZ in wave32

* Update skip-if-dead.ll with tests for wave32.
* Fix the crash in verifier in one newly enabled test by adding
  missing fixImplicitOperands in branch insertion code.

```
*** Bad machine code: Using an undefined physical register ***
- function:    test_kill_divergent_loop
- basic block: %bb.2 bb (0xad96308)
- instruction: S_CBRANCH_VCCNZ %bb.1, implicit $vcc_lo
- operand 1:   implicit $vcc_lo
LLVM ERROR: Found 1 machine code errors.
```

* Simplify "cbranch_kill" to not use interp instructions.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D96793
This commit is contained in:
Piotr Sobczak 2021-02-17 10:56:29 +01:00
parent 81bbde389a
commit 55a4cf137d
2 changed files with 871 additions and 486 deletions

View File

@ -2415,6 +2415,7 @@ unsigned SIInstrInfo::insertBranch(MachineBasicBlock &MBB,
MachineInstr *CondBr =
BuildMI(&MBB, DL, get(Opcode))
.addMBB(TBB);
fixImplicitOperands(*CondBr);
BuildMI(&MBB, DL, get(AMDGPU::S_BRANCH))
.addMBB(FBB);

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