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Use the new 'defm' class inheritance in SSE

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llvm-svn: 106327
This commit is contained in:
Bruno Cardoso Lopes 2010-06-18 22:10:11 +00:00
parent 9a97e1e7f7
commit 55fbcf678c
1 changed files with 24 additions and 32 deletions
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56
lib/Target/X86/X86InstrSSE.td
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@ -672,29 +672,25 @@ let Constraints = "$src1 = $dst" in {
multiclass basic_sse12_fp_binop_rm<bits<8> opc, string OpcodeStr, multiclass basic_sse12_fp_binop_rm<bits<8> opc, string OpcodeStr,
SDNode OpNode, bit Commutable = 0> { SDNode OpNode, bit Commutable = 0> {
let Constraints = "", isAsmParserOnly = 1, hasVEX_4VPrefix = 1 in { let Constraints = "", isAsmParserOnly = 1 in {
// Scalar operation, reg+reg. // Scalar operation, reg+reg.
let Prefix = 12 /* XS */ in defm V#NAME#SS : sse12_fp_scalar<opc,
defm V#NAME#SS : sse12_fp_scalar<opc,
!strconcat(OpcodeStr, "ss\t{$src2, $src1, $dst|$dst, $src1, $src2}"), !strconcat(OpcodeStr, "ss\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
OpNode, FR32, f32mem>; OpNode, FR32, f32mem>, XS, VEX_4V;
let Prefix = 11 /* XD */ in defm V#NAME#SD : sse12_fp_scalar<opc,
defm V#NAME#SD : sse12_fp_scalar<opc,
!strconcat(OpcodeStr, "sd\t{$src2, $src1, $dst|$dst, $src1, $src2}"), !strconcat(OpcodeStr, "sd\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
OpNode, FR64, f64mem>; OpNode, FR64, f64mem>, XD, VEX_4V;
} }
let Constraints = "$src1 = $dst" in { let Constraints = "$src1 = $dst" in {
// Scalar operation, reg+reg. // Scalar operation, reg+reg.
let Prefix = 12 /* XS */ in defm SS : sse12_fp_scalar<opc,
defm SS : sse12_fp_scalar<opc, !strconcat(OpcodeStr, "ss\t{$src2, $dst|$dst, $src2}"),
!strconcat(OpcodeStr, "ss\t{$src2, $dst|$dst, $src2}"), OpNode, FR32, f32mem>, XS;
OpNode, FR32, f32mem>; defm SD : sse12_fp_scalar<opc,
let Prefix = 11 /* XD */ in !strconcat(OpcodeStr, "sd\t{$src2, $dst|$dst, $src2}"),
defm SD : sse12_fp_scalar<opc, OpNode, FR64, f64mem>, XD;
!strconcat(OpcodeStr, "sd\t{$src2, $dst|$dst, $src2}"),
OpNode, FR64, f64mem>;
} }
// Vector operation, reg+reg. // Vector operation, reg+reg.
@ -857,29 +853,25 @@ let Constraints = "$src1 = $dst" in {
multiclass sse12_fp_binop_rm<bits<8> opc, string OpcodeStr, multiclass sse12_fp_binop_rm<bits<8> opc, string OpcodeStr,
SDNode OpNode, bit Commutable = 0> { SDNode OpNode, bit Commutable = 0> {
let Constraints = "", isAsmParserOnly = 1, hasVEX_4VPrefix = 1 in { let Constraints = "", isAsmParserOnly = 1 in {
// Scalar operation, reg+reg. // Scalar operation, reg+reg.
let Prefix = 12 /* XS */ in defm V#NAME#SS : sse12_fp_scalar<opc,
defm V#NAME#SS : sse12_fp_scalar<opc, !strconcat(OpcodeStr, "ss\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
!strconcat(OpcodeStr, "ss\t{$src2, $src1, $dst|$dst, $src1, $src2}"), OpNode, FR32, f32mem>, XS, VEX_4V;
OpNode, FR32, f32mem>;
let Prefix = 11 /* XD */ in defm V#NAME#SD : sse12_fp_scalar<opc,
defm V#NAME#SD : sse12_fp_scalar<opc, !strconcat(OpcodeStr, "sd\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
!strconcat(OpcodeStr, "sd\t{$src2, $src1, $dst|$dst, $src1, $src2}"), OpNode, FR64, f64mem>, XD, VEX_4V;
OpNode, FR64, f64mem>;
} }
let Constraints = "$src1 = $dst" in { let Constraints = "$src1 = $dst" in {
// Scalar operation, reg+reg. // Scalar operation, reg+reg.
let Prefix = 12 /* XS */ in defm SS : sse12_fp_scalar<opc,
defm SS : sse12_fp_scalar<opc, !strconcat(OpcodeStr, "ss\t{$src2, $dst|$dst, $src2}"),
!strconcat(OpcodeStr, "ss\t{$src2, $dst|$dst, $src2}"), OpNode, FR32, f32mem>, XS;
OpNode, FR32, f32mem>; defm SD : sse12_fp_scalar<opc,
let Prefix = 11 /* XD */ in !strconcat(OpcodeStr, "sd\t{$src2, $dst|$dst, $src2}"),
defm SD : sse12_fp_scalar<opc, OpNode, FR64, f64mem>, XD;
!strconcat(OpcodeStr, "sd\t{$src2, $dst|$dst, $src2}"),
OpNode, FR64, f64mem>;
} }
// Vector operation, reg+reg. // Vector operation, reg+reg.