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https://github.com/RPCS3/llvm-mirror.git
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[X86][TBM] Add tests showing failure to fold RFLAGS result into TBM instructions.
And fails to select TBM instructions at all. llvm-svn: 310790
This commit is contained in:
parent
78eb041ca7
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@ -24,6 +24,20 @@ entry:
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ret i32 %0
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}
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define i32 @test_x86_tbm_bextri_u32_z(i32 %a, i32 %b) nounwind readonly {
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; CHECK-LABEL: test_x86_tbm_bextri_u32_z:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: bextr $2814, %edi, %eax # imm = 0xAFE
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; CHECK-NEXT: testl %eax, %eax
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; CHECK-NEXT: cmovel %esi, %eax
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; CHECK-NEXT: retq
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entry:
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%0 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %a, i32 2814)
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%1 = icmp eq i32 %0, 0
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%2 = select i1 %1, i32 %b, i32 %0
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ret i32 %2
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}
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define i64 @test_x86_tbm_bextri_u64(i64 %a) nounwind readnone {
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; CHECK-LABEL: test_x86_tbm_bextri_u64:
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; CHECK: # BB#0: # %entry
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@ -46,3 +60,17 @@ entry:
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%0 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %tmp1, i64 2814)
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ret i64 %0
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}
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define i64 @test_x86_tbm_bextri_u64_z(i64 %a, i64 %b) nounwind readnone {
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; CHECK-LABEL: test_x86_tbm_bextri_u64_z:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: bextr $2814, %rdi, %rax # imm = 0xAFE
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; CHECK-NEXT: testq %rax, %rax
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; CHECK-NEXT: cmoveq %rsi, %rax
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; CHECK-NEXT: retq
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entry:
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%0 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %a, i64 2814)
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%1 = icmp eq i64 %0, 0
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%2 = select i1 %1, i64 %b, i64 %0
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ret i64 %2
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}
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@ -1,6 +1,8 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+tbm < %s | FileCheck %s
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; TODO - Patterns fail to fold with ZF flags and prevents TBM instruction selection.
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define i32 @test_x86_tbm_bextri_u32(i32 %a) nounwind {
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; CHECK-LABEL: test_x86_tbm_bextri_u32:
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; CHECK: # BB#0:
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@ -22,6 +24,21 @@ define i32 @test_x86_tbm_bextri_u32_m(i32* nocapture %a) nounwind {
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ret i32 %t2
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}
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define i32 @test_x86_tbm_bextri_u32_z(i32 %a, i32 %b) nounwind {
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; CHECK-LABEL: test_x86_tbm_bextri_u32_z:
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; CHECK: # BB#0:
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; CHECK-NEXT: shrl $4, %edi
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; CHECK-NEXT: andl $4095, %edi # imm = 0xFFF
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; CHECK-NEXT: cmovel %esi, %edi
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: retq
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%t0 = lshr i32 %a, 4
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%t1 = and i32 %t0, 4095
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%t2 = icmp eq i32 %t1, 0
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%t3 = select i1 %t2, i32 %b, i32 %t1
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ret i32 %t3
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}
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define i64 @test_x86_tbm_bextri_u64(i64 %a) nounwind {
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; CHECK-LABEL: test_x86_tbm_bextri_u64:
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; CHECK: # BB#0:
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@ -43,6 +60,21 @@ define i64 @test_x86_tbm_bextri_u64_m(i64* nocapture %a) nounwind {
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ret i64 %t2
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}
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define i64 @test_x86_tbm_bextri_u64_z(i64 %a, i64 %b) nounwind {
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; CHECK-LABEL: test_x86_tbm_bextri_u64_z:
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; CHECK: # BB#0:
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; CHECK-NEXT: shrl $4, %edi
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; CHECK-NEXT: andl $4095, %edi # imm = 0xFFF
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; CHECK-NEXT: cmoveq %rsi, %rdi
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: retq
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%t0 = lshr i64 %a, 4
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%t1 = and i64 %t0, 4095
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%t2 = icmp eq i64 %t1, 0
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%t3 = select i1 %t2, i64 %b, i64 %t1
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ret i64 %t3
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}
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define i32 @test_x86_tbm_blcfill_u32(i32 %a) nounwind {
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; CHECK-LABEL: test_x86_tbm_blcfill_u32:
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; CHECK: # BB#0:
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@ -53,6 +85,21 @@ define i32 @test_x86_tbm_blcfill_u32(i32 %a) nounwind {
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ret i32 %t1
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}
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define i32 @test_x86_tbm_blcfill_u32_z(i32 %a, i32 %b) nounwind {
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; CHECK-LABEL: test_x86_tbm_blcfill_u32_z:
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; CHECK: # BB#0:
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; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
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; CHECK-NEXT: leal 1(%rdi), %eax
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; CHECK-NEXT: andl %edi, %eax
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; CHECK-NEXT: cmovel %esi, %eax
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; CHECK-NEXT: retq
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%t0 = add i32 %a, 1
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%t1 = and i32 %t0, %a
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%t2 = icmp eq i32 %t1, 0
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%t3 = select i1 %t2, i32 %b, i32 %t1
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ret i32 %t3
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}
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define i64 @test_x86_tbm_blcfill_u64(i64 %a) nounwind {
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; CHECK-LABEL: test_x86_tbm_blcfill_u64:
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; CHECK: # BB#0:
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@ -63,6 +110,20 @@ define i64 @test_x86_tbm_blcfill_u64(i64 %a) nounwind {
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ret i64 %t1
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}
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define i64 @test_x86_tbm_blcfill_u64_z(i64 %a, i64 %b) nounwind {
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; CHECK-LABEL: test_x86_tbm_blcfill_u64_z:
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; CHECK: # BB#0:
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; CHECK-NEXT: leaq 1(%rdi), %rax
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; CHECK-NEXT: andq %rdi, %rax
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; CHECK-NEXT: cmoveq %rsi, %rax
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; CHECK-NEXT: retq
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%t0 = add i64 %a, 1
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%t1 = and i64 %t0, %a
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%t2 = icmp eq i64 %t1, 0
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%t3 = select i1 %t2, i64 %b, i64 %t1
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ret i64 %t3
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}
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define i32 @test_x86_tbm_blci_u32(i32 %a) nounwind {
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; CHECK-LABEL: test_x86_tbm_blci_u32:
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; CHECK: # BB#0:
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@ -74,6 +135,23 @@ define i32 @test_x86_tbm_blci_u32(i32 %a) nounwind {
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ret i32 %t2
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}
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define i32 @test_x86_tbm_blci_u32_z(i32 %a, i32 %b) nounwind {
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; CHECK-LABEL: test_x86_tbm_blci_u32_z:
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; CHECK: # BB#0:
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; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
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; CHECK-NEXT: leal 1(%rdi), %eax
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; CHECK-NEXT: notl %eax
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; CHECK-NEXT: orl %edi, %eax
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; CHECK-NEXT: cmovel %esi, %eax
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; CHECK-NEXT: retq
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%t0 = add i32 1, %a
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%t1 = xor i32 %t0, -1
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%t2 = or i32 %t1, %a
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%t3 = icmp eq i32 %t2, 0
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%t4 = select i1 %t3, i32 %b, i32 %t2
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ret i32 %t4
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}
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define i64 @test_x86_tbm_blci_u64(i64 %a) nounwind {
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; CHECK-LABEL: test_x86_tbm_blci_u64:
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; CHECK: # BB#0:
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@ -85,6 +163,22 @@ define i64 @test_x86_tbm_blci_u64(i64 %a) nounwind {
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ret i64 %t2
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}
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define i64 @test_x86_tbm_blci_u64_z(i64 %a, i64 %b) nounwind {
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; CHECK-LABEL: test_x86_tbm_blci_u64_z:
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; CHECK: # BB#0:
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; CHECK-NEXT: leaq 1(%rdi), %rax
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; CHECK-NEXT: notq %rax
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; CHECK-NEXT: orq %rdi, %rax
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; CHECK-NEXT: cmoveq %rsi, %rax
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; CHECK-NEXT: retq
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%t0 = add i64 1, %a
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%t1 = xor i64 %t0, -1
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%t2 = or i64 %t1, %a
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%t3 = icmp eq i64 %t2, 0
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%t4 = select i1 %t3, i64 %b, i64 %t2
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ret i64 %t4
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}
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define i32 @test_x86_tbm_blci_u32_b(i32 %a) nounwind {
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; CHECK-LABEL: test_x86_tbm_blci_u32_b:
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; CHECK: # BB#0:
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@ -116,6 +210,24 @@ define i32 @test_x86_tbm_blcic_u32(i32 %a) nounwind {
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ret i32 %t2
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}
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define i32 @test_x86_tbm_blcic_u32_z(i32 %a, i32 %b) nounwind {
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; CHECK-LABEL: test_x86_tbm_blcic_u32_z:
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; CHECK: # BB#0:
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; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
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; CHECK-NEXT: leal 1(%rdi), %eax
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; CHECK-NEXT: movl %edi, %ecx
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; CHECK-NEXT: notl %ecx
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; CHECK-NEXT: andl %ecx, %eax
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; CHECK-NEXT: cmovel %esi, %eax
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; CHECK-NEXT: retq
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%t0 = xor i32 %a, -1
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%t1 = add i32 %a, 1
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%t2 = and i32 %t1, %t0
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%t3 = icmp eq i32 %t2, 0
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%t4 = select i1 %t3, i32 %b, i32 %t2
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ret i32 %t4
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}
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define i64 @test_x86_tbm_blcic_u64(i64 %a) nounwind {
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; CHECK-LABEL: test_x86_tbm_blcic_u64:
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; CHECK: # BB#0:
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@ -127,6 +239,22 @@ define i64 @test_x86_tbm_blcic_u64(i64 %a) nounwind {
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ret i64 %t2
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}
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define i64 @test_x86_tbm_blcic_u64_z(i64 %a, i64 %b) nounwind {
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; CHECK-LABEL: test_x86_tbm_blcic_u64_z:
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; CHECK: # BB#0:
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; CHECK-NEXT: leaq 1(%rdi), %rax
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; CHECK-NEXT: notq %rdi
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; CHECK-NEXT: andq %rdi, %rax
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; CHECK-NEXT: cmoveq %rsi, %rax
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; CHECK-NEXT: retq
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%t0 = xor i64 %a, -1
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%t1 = add i64 %a, 1
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%t2 = and i64 %t1, %t0
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%t3 = icmp eq i64 %t2, 0
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%t4 = select i1 %t3, i64 %b, i64 %t2
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ret i64 %t4
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}
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define i32 @test_x86_tbm_blcmsk_u32(i32 %a) nounwind {
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; CHECK-LABEL: test_x86_tbm_blcmsk_u32:
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; CHECK: # BB#0:
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@ -137,6 +265,21 @@ define i32 @test_x86_tbm_blcmsk_u32(i32 %a) nounwind {
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ret i32 %t1
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}
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define i32 @test_x86_tbm_blcmsk_u32_z(i32 %a, i32 %b) nounwind {
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; CHECK-LABEL: test_x86_tbm_blcmsk_u32_z:
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; CHECK: # BB#0:
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; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
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; CHECK-NEXT: leal 1(%rdi), %eax
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; CHECK-NEXT: xorl %edi, %eax
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; CHECK-NEXT: cmovel %esi, %eax
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; CHECK-NEXT: retq
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%t0 = add i32 %a, 1
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%t1 = xor i32 %t0, %a
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%t2 = icmp eq i32 %t1, 0
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%t3 = select i1 %t2, i32 %b, i32 %t1
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ret i32 %t3
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}
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define i64 @test_x86_tbm_blcmsk_u64(i64 %a) nounwind {
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; CHECK-LABEL: test_x86_tbm_blcmsk_u64:
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; CHECK: # BB#0:
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@ -147,6 +290,20 @@ define i64 @test_x86_tbm_blcmsk_u64(i64 %a) nounwind {
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ret i64 %t1
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}
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define i64 @test_x86_tbm_blcmsk_u64_z(i64 %a, i64 %b) nounwind {
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; CHECK-LABEL: test_x86_tbm_blcmsk_u64_z:
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; CHECK: # BB#0:
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; CHECK-NEXT: leaq 1(%rdi), %rax
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; CHECK-NEXT: xorq %rdi, %rax
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; CHECK-NEXT: cmoveq %rsi, %rax
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; CHECK-NEXT: retq
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%t0 = add i64 %a, 1
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%t1 = xor i64 %t0, %a
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%t2 = icmp eq i64 %t1, 0
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%t3 = select i1 %t2, i64 %b, i64 %t1
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ret i64 %t3
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}
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define i32 @test_x86_tbm_blcs_u32(i32 %a) nounwind {
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; CHECK-LABEL: test_x86_tbm_blcs_u32:
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; CHECK: # BB#0:
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@ -157,6 +314,21 @@ define i32 @test_x86_tbm_blcs_u32(i32 %a) nounwind {
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ret i32 %t1
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}
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define i32 @test_x86_tbm_blcs_u32_z(i32 %a, i32 %b) nounwind {
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; CHECK-LABEL: test_x86_tbm_blcs_u32_z:
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; CHECK: # BB#0:
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; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
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; CHECK-NEXT: leal 1(%rdi), %eax
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; CHECK-NEXT: orl %edi, %eax
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; CHECK-NEXT: cmovel %esi, %eax
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; CHECK-NEXT: retq
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%t0 = add i32 %a, 1
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%t1 = or i32 %t0, %a
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%t2 = icmp eq i32 %t1, 0
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%t3 = select i1 %t2, i32 %b, i32 %t1
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ret i32 %t3
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}
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define i64 @test_x86_tbm_blcs_u64(i64 %a) nounwind {
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; CHECK-LABEL: test_x86_tbm_blcs_u64:
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; CHECK: # BB#0:
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@ -167,6 +339,20 @@ define i64 @test_x86_tbm_blcs_u64(i64 %a) nounwind {
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ret i64 %t1
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}
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define i64 @test_x86_tbm_blcs_u64_z(i64 %a, i64 %b) nounwind {
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; CHECK-LABEL: test_x86_tbm_blcs_u64_z:
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; CHECK: # BB#0:
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; CHECK-NEXT: leaq 1(%rdi), %rax
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; CHECK-NEXT: orq %rdi, %rax
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; CHECK-NEXT: cmoveq %rsi, %rax
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; CHECK-NEXT: retq
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%t0 = add i64 %a, 1
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%t1 = or i64 %t0, %a
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%t2 = icmp eq i64 %t1, 0
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%t3 = select i1 %t2, i64 %b, i64 %t1
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ret i64 %t3
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}
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define i32 @test_x86_tbm_blsfill_u32(i32 %a) nounwind {
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; CHECK-LABEL: test_x86_tbm_blsfill_u32:
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; CHECK: # BB#0:
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@ -177,6 +363,21 @@ define i32 @test_x86_tbm_blsfill_u32(i32 %a) nounwind {
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ret i32 %t1
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}
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define i32 @test_x86_tbm_blsfill_u32_z(i32 %a, i32 %b) nounwind {
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; CHECK-LABEL: test_x86_tbm_blsfill_u32_z:
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; CHECK: # BB#0:
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; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
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; CHECK-NEXT: leal -1(%rdi), %eax
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; CHECK-NEXT: orl %edi, %eax
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; CHECK-NEXT: cmovel %esi, %eax
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; CHECK-NEXT: retq
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%t0 = add i32 %a, -1
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%t1 = or i32 %t0, %a
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%t2 = icmp eq i32 %t1, 0
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%t3 = select i1 %t2, i32 %b, i32 %t1
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ret i32 %t3
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}
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define i64 @test_x86_tbm_blsfill_u64(i64 %a) nounwind {
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; CHECK-LABEL: test_x86_tbm_blsfill_u64:
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; CHECK: # BB#0:
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@ -187,6 +388,20 @@ define i64 @test_x86_tbm_blsfill_u64(i64 %a) nounwind {
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ret i64 %t1
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}
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define i64 @test_x86_tbm_blsfill_u64_z(i64 %a, i64 %b) nounwind {
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; CHECK-LABEL: test_x86_tbm_blsfill_u64_z:
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; CHECK: # BB#0:
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; CHECK-NEXT: leaq -1(%rdi), %rax
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; CHECK-NEXT: orq %rdi, %rax
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; CHECK-NEXT: cmoveq %rsi, %rax
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; CHECK-NEXT: retq
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%t0 = add i64 %a, -1
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%t1 = or i64 %t0, %a
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%t2 = icmp eq i64 %t1, 0
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%t3 = select i1 %t2, i64 %b, i64 %t1
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ret i64 %t3
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}
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define i32 @test_x86_tbm_blsic_u32(i32 %a) nounwind {
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; CHECK-LABEL: test_x86_tbm_blsic_u32:
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; CHECK: # BB#0:
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@ -198,6 +413,24 @@ define i32 @test_x86_tbm_blsic_u32(i32 %a) nounwind {
|
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ret i32 %t2
|
||||
}
|
||||
|
||||
define i32 @test_x86_tbm_blsic_u32_z(i32 %a, i32 %b) nounwind {
|
||||
; CHECK-LABEL: test_x86_tbm_blsic_u32_z:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: movl %edi, %eax
|
||||
; CHECK-NEXT: notl %eax
|
||||
; CHECK-NEXT: decl %edi
|
||||
; CHECK-NEXT: orl %eax, %edi
|
||||
; CHECK-NEXT: cmovel %esi, %edi
|
||||
; CHECK-NEXT: movl %edi, %eax
|
||||
; CHECK-NEXT: retq
|
||||
%t0 = xor i32 %a, -1
|
||||
%t1 = add i32 %a, -1
|
||||
%t2 = or i32 %t0, %t1
|
||||
%t3 = icmp eq i32 %t2, 0
|
||||
%t4 = select i1 %t3, i32 %b, i32 %t2
|
||||
ret i32 %t4
|
||||
}
|
||||
|
||||
define i64 @test_x86_tbm_blsic_u64(i64 %a) nounwind {
|
||||
; CHECK-LABEL: test_x86_tbm_blsic_u64:
|
||||
; CHECK: # BB#0:
|
||||
@ -209,6 +442,24 @@ define i64 @test_x86_tbm_blsic_u64(i64 %a) nounwind {
|
||||
ret i64 %t2
|
||||
}
|
||||
|
||||
define i64 @test_x86_tbm_blsic_u64_z(i64 %a, i64 %b) nounwind {
|
||||
; CHECK-LABEL: test_x86_tbm_blsic_u64_z:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: movq %rdi, %rax
|
||||
; CHECK-NEXT: notq %rax
|
||||
; CHECK-NEXT: decq %rdi
|
||||
; CHECK-NEXT: orq %rax, %rdi
|
||||
; CHECK-NEXT: cmoveq %rsi, %rdi
|
||||
; CHECK-NEXT: movq %rdi, %rax
|
||||
; CHECK-NEXT: retq
|
||||
%t0 = xor i64 %a, -1
|
||||
%t1 = add i64 %a, -1
|
||||
%t2 = or i64 %t0, %t1
|
||||
%t3 = icmp eq i64 %t2, 0
|
||||
%t4 = select i1 %t3, i64 %b, i64 %t2
|
||||
ret i64 %t4
|
||||
}
|
||||
|
||||
define i32 @test_x86_tbm_t1mskc_u32(i32 %a) nounwind {
|
||||
; CHECK-LABEL: test_x86_tbm_t1mskc_u32:
|
||||
; CHECK: # BB#0:
|
||||
@ -220,8 +471,26 @@ define i32 @test_x86_tbm_t1mskc_u32(i32 %a) nounwind {
|
||||
ret i32 %t2
|
||||
}
|
||||
|
||||
define i64 @Ttest_x86_tbm_t1mskc_u64(i64 %a) nounwind {
|
||||
; CHECK-LABEL: Ttest_x86_tbm_t1mskc_u64:
|
||||
define i32 @test_x86_tbm_t1mskc_u32_z(i32 %a, i32 %b) nounwind {
|
||||
; CHECK-LABEL: test_x86_tbm_t1mskc_u32_z:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: movl %edi, %eax
|
||||
; CHECK-NEXT: notl %eax
|
||||
; CHECK-NEXT: incl %edi
|
||||
; CHECK-NEXT: orl %eax, %edi
|
||||
; CHECK-NEXT: cmovel %esi, %edi
|
||||
; CHECK-NEXT: movl %edi, %eax
|
||||
; CHECK-NEXT: retq
|
||||
%t0 = xor i32 %a, -1
|
||||
%t1 = add i32 %a, 1
|
||||
%t2 = or i32 %t0, %t1
|
||||
%t3 = icmp eq i32 %t2, 0
|
||||
%t4 = select i1 %t3, i32 %b, i32 %t2
|
||||
ret i32 %t4
|
||||
}
|
||||
|
||||
define i64 @test_x86_tbm_t1mskc_u64(i64 %a) nounwind {
|
||||
; CHECK-LABEL: test_x86_tbm_t1mskc_u64:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: t1mskc %rdi, %rax
|
||||
; CHECK-NEXT: retq
|
||||
@ -231,6 +500,24 @@ define i64 @Ttest_x86_tbm_t1mskc_u64(i64 %a) nounwind {
|
||||
ret i64 %t2
|
||||
}
|
||||
|
||||
define i64 @test_x86_tbm_t1mskc_u64_z(i64 %a, i64 %b) nounwind {
|
||||
; CHECK-LABEL: test_x86_tbm_t1mskc_u64_z:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: movq %rdi, %rax
|
||||
; CHECK-NEXT: notq %rax
|
||||
; CHECK-NEXT: incq %rdi
|
||||
; CHECK-NEXT: orq %rax, %rdi
|
||||
; CHECK-NEXT: cmoveq %rsi, %rdi
|
||||
; CHECK-NEXT: movq %rdi, %rax
|
||||
; CHECK-NEXT: retq
|
||||
%t0 = xor i64 %a, -1
|
||||
%t1 = add i64 %a, 1
|
||||
%t2 = or i64 %t0, %t1
|
||||
%t3 = icmp eq i64 %t2, 0
|
||||
%t4 = select i1 %t3, i64 %b, i64 %t2
|
||||
ret i64 %t4
|
||||
}
|
||||
|
||||
define i32 @test_x86_tbm_tzmsk_u32(i32 %a) nounwind {
|
||||
; CHECK-LABEL: test_x86_tbm_tzmsk_u32:
|
||||
; CHECK: # BB#0:
|
||||
@ -242,6 +529,24 @@ define i32 @test_x86_tbm_tzmsk_u32(i32 %a) nounwind {
|
||||
ret i32 %t2
|
||||
}
|
||||
|
||||
define i32 @test_x86_tbm_tzmsk_u32_z(i32 %a, i32 %b) nounwind {
|
||||
; CHECK-LABEL: test_x86_tbm_tzmsk_u32_z:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: movl %edi, %eax
|
||||
; CHECK-NEXT: notl %eax
|
||||
; CHECK-NEXT: decl %edi
|
||||
; CHECK-NEXT: andl %eax, %edi
|
||||
; CHECK-NEXT: cmovel %esi, %edi
|
||||
; CHECK-NEXT: movl %edi, %eax
|
||||
; CHECK-NEXT: retq
|
||||
%t0 = xor i32 %a, -1
|
||||
%t1 = add i32 %a, -1
|
||||
%t2 = and i32 %t0, %t1
|
||||
%t3 = icmp eq i32 %t2, 0
|
||||
%t4 = select i1 %t3, i32 %b, i32 %t2
|
||||
ret i32 %t4
|
||||
}
|
||||
|
||||
define i64 @test_x86_tbm_tzmsk_u64(i64 %a) nounwind {
|
||||
; CHECK-LABEL: test_x86_tbm_tzmsk_u64:
|
||||
; CHECK: # BB#0:
|
||||
@ -253,6 +558,24 @@ define i64 @test_x86_tbm_tzmsk_u64(i64 %a) nounwind {
|
||||
ret i64 %t2
|
||||
}
|
||||
|
||||
define i64 @test_x86_tbm_tzmsk_u64_z(i64 %a, i64 %b) nounwind {
|
||||
; CHECK-LABEL: test_x86_tbm_tzmsk_u64_z:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: movq %rdi, %rax
|
||||
; CHECK-NEXT: notq %rax
|
||||
; CHECK-NEXT: decq %rdi
|
||||
; CHECK-NEXT: andq %rax, %rdi
|
||||
; CHECK-NEXT: cmoveq %rsi, %rdi
|
||||
; CHECK-NEXT: movq %rdi, %rax
|
||||
; CHECK-NEXT: retq
|
||||
%t0 = xor i64 %a, -1
|
||||
%t1 = add i64 %a, -1
|
||||
%t2 = and i64 %t0, %t1
|
||||
%t3 = icmp eq i64 %t2, 0
|
||||
%t4 = select i1 %t3, i64 %b, i64 %t2
|
||||
ret i64 %t4
|
||||
}
|
||||
|
||||
define i64 @test_and_large_constant_mask(i64 %x) {
|
||||
; CHECK-LABEL: test_and_large_constant_mask:
|
||||
; CHECK: # BB#0: # %entry
|
||||
|
Loading…
Reference in New Issue
Block a user