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[LLVM][XRAY][MIPS] Support xray on mips/mipsel/mips64/mips64el
Summary: Adds support for xray instrumentation on mips for both 32-bit and 64-bit. Reviewed by sdardis, dberris Differential: D27697 llvm-svn: 295164
This commit is contained in:
Sagar Thakur
parent
e27f967c5e
commit
5602c70c9c
@ -158,6 +158,10 @@ bool XRayInstrumentation::runOnMachineFunction(MachineFunction &MF) {
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case Triple::ArchType::thumb:
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case Triple::ArchType::aarch64:
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case Triple::ArchType::ppc64le:
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case Triple::ArchType::mips:
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case Triple::ArchType::mipsel:
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case Triple::ArchType::mips64:
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case Triple::ArchType::mips64el:
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// For the architectures which don't have a single return instruction
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prependRetWithPatchableExit(MF, TII);
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break;
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@ -39,6 +39,7 @@
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#include "llvm/MC/MCELFStreamer.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCInstBuilder.h"
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#include "llvm/MC/MCSection.h"
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#include "llvm/MC/MCSectionELF.h"
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#include "llvm/MC/MCSymbolELF.h"
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@ -79,6 +80,9 @@ bool MipsAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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NaClAlignIndirectJumpTargets(MF);
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AsmPrinter::runOnMachineFunction(MF);
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EmitXRayTable();
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return true;
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}
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@ -132,6 +136,7 @@ void MipsAsmPrinter::emitPseudoIndirectBranch(MCStreamer &OutStreamer,
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void MipsAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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MipsTargetStreamer &TS = getTargetStreamer();
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unsigned Opc = MI->getOpcode();
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TS.forbidModuleDirective();
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if (MI->isDebugValue()) {
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@ -143,20 +148,20 @@ void MipsAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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}
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// If we just ended a constant pool, mark it as such.
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if (InConstantPool && MI->getOpcode() != Mips::CONSTPOOL_ENTRY) {
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if (InConstantPool && Opc != Mips::CONSTPOOL_ENTRY) {
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OutStreamer->EmitDataRegion(MCDR_DataRegionEnd);
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InConstantPool = false;
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}
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if (MI->getOpcode() == Mips::CONSTPOOL_ENTRY) {
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if (Opc == Mips::CONSTPOOL_ENTRY) {
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// CONSTPOOL_ENTRY - This instruction represents a floating
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//constant pool in the function. The first operand is the ID#
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// constant pool in the function. The first operand is the ID#
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// for this instruction, the second is the index into the
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// MachineConstantPool that this is, the third is the size in
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// bytes of this constant pool entry.
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// The required alignment is specified on the basic block holding this MI.
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//
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unsigned LabelId = (unsigned)MI->getOperand(0).getImm();
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unsigned CPIdx = (unsigned)MI->getOperand(1).getIndex();
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unsigned CPIdx = (unsigned)MI->getOperand(1).getIndex();
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// If this is the first entry of the pool, mark it.
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if (!InConstantPool) {
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@ -174,6 +179,17 @@ void MipsAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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return;
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}
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switch (Opc) {
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case Mips::PATCHABLE_FUNCTION_ENTER:
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LowerPATCHABLE_FUNCTION_ENTER(*MI);
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return;
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case Mips::PATCHABLE_FUNCTION_EXIT:
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LowerPATCHABLE_FUNCTION_EXIT(*MI);
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return;
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case Mips::PATCHABLE_TAIL_CALL:
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LowerPATCHABLE_TAIL_CALL(*MI);
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return;
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}
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MachineBasicBlock::const_instr_iterator I = MI->getIterator();
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MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
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@ -1034,6 +1050,149 @@ void MipsAsmPrinter::EmitEndOfAsmFile(Module &M) {
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OutStreamer->SwitchSection(OutContext.getObjectFileInfo()->getTextSection());
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}
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void MipsAsmPrinter::EmitSled(const MachineInstr &MI, SledKind Kind) {
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const uint8_t NoopsInSledCount = Subtarget->isGP64bit() ? 15 : 11;
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// For mips32 we want to emit the following pattern:
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//
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// .Lxray_sled_N:
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// ALIGN
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// B .tmpN
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// 11 NOP instructions (44 bytes)
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// ADDIU T9, T9, 52
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// .tmpN
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//
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// We need the 44 bytes (11 instructions) because at runtime, we'd
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// be patching over the full 48 bytes (12 instructions) with the following
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// pattern:
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//
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// ADDIU SP, SP, -8
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// NOP
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// SW RA, 4(SP)
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// SW T9, 0(SP)
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// LUI T9, %hi(__xray_FunctionEntry/Exit)
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// ORI T9, T9, %lo(__xray_FunctionEntry/Exit)
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// LUI T0, %hi(function_id)
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// JALR T9
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// ORI T0, T0, %lo(function_id)
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// LW T9, 0(SP)
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// LW RA, 4(SP)
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// ADDIU SP, SP, 8
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//
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// We add 52 bytes to t9 because we want to adjust the function pointer to
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// the actual start of function i.e. the address just after the noop sled.
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// We do this because gp displacement relocation is emitted at the start of
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// of the function i.e after the nop sled and to correctly calculate the
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// global offset table address, t9 must hold the address of the instruction
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// containing the gp displacement relocation.
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// FIXME: Is this correct for the static relocation model?
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//
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// For mips64 we want to emit the following pattern:
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//
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// .Lxray_sled_N:
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// ALIGN
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// B .tmpN
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// 15 NOP instructions (60 bytes)
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// .tmpN
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//
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// We need the 60 bytes (15 instructions) because at runtime, we'd
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// be patching over the full 64 bytes (16 instructions) with the following
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// pattern:
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//
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// DADDIU SP, SP, -16
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// NOP
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// SD RA, 8(SP)
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// SD T9, 0(SP)
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// LUI T9, %highest(__xray_FunctionEntry/Exit)
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// ORI T9, T9, %higher(__xray_FunctionEntry/Exit)
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// DSLL T9, T9, 16
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// ORI T9, T9, %hi(__xray_FunctionEntry/Exit)
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// DSLL T9, T9, 16
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// ORI T9, T9, %lo(__xray_FunctionEntry/Exit)
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// LUI T0, %hi(function_id)
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// JALR T9
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// ADDIU T0, T0, %lo(function_id)
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// LD T9, 0(SP)
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// LD RA, 8(SP)
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// DADDIU SP, SP, 16
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//
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OutStreamer->EmitCodeAlignment(4);
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auto CurSled = OutContext.createTempSymbol("xray_sled_", true);
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OutStreamer->EmitLabel(CurSled);
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auto Target = OutContext.createTempSymbol();
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// Emit "B .tmpN" instruction, which jumps over the nop sled to the actual
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// start of function
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const MCExpr *TargetExpr = MCSymbolRefExpr::create(
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Target, MCSymbolRefExpr::VariantKind::VK_None, OutContext);
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EmitToStreamer(*OutStreamer, MCInstBuilder(Mips::BEQ)
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.addReg(Mips::ZERO)
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.addReg(Mips::ZERO)
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.addExpr(TargetExpr));
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for (int8_t I = 0; I < NoopsInSledCount; I++)
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EmitToStreamer(*OutStreamer, MCInstBuilder(Mips::SLL)
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.addReg(Mips::ZERO)
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.addReg(Mips::ZERO)
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.addImm(0));
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OutStreamer->EmitLabel(Target);
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if (!Subtarget->isGP64bit()) {
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EmitToStreamer(*OutStreamer,
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MCInstBuilder(Mips::ADDiu)
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.addReg(Mips::T9)
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.addReg(Mips::T9)
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.addImm(0x34));
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}
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recordSled(CurSled, MI, Kind);
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}
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void MipsAsmPrinter::EmitXRayTable() {
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if (Sleds.empty())
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return;
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if (Subtarget->isTargetELF()) {
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auto PrevSection = OutStreamer->getCurrentSectionOnly();
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auto Fn = MF->getFunction();
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MCSection *Section;
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if (Fn->hasComdat())
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Section = OutContext.getELFSection("xray_instr_map", ELF::SHT_PROGBITS,
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ELF::SHF_ALLOC | ELF::SHF_GROUP, 0,
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Fn->getComdat()->getName());
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else
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Section =
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OutContext.getELFSection("xray_instr_map", ELF::SHT_PROGBITS,
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ELF::SHF_ALLOC, 0, CurrentFnSym->getName());
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OutStreamer->SwitchSection(Section);
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for (const auto &Sled : Sleds) {
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OutStreamer->EmitSymbolValue(Sled.Sled, Subtarget->isGP64bit() ? 8 : 4);
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OutStreamer->EmitSymbolValue(CurrentFnSym, Subtarget->isGP64bit() ? 8 : 4);
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auto Kind = static_cast<uint8_t>(Sled.Kind);
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OutStreamer->EmitBytes(
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StringRef(reinterpret_cast<const char *>(&Kind), 1));
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OutStreamer->EmitBytes(
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StringRef(reinterpret_cast<const char *>(&Sled.AlwaysInstrument), 1));
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OutStreamer->EmitZeros(Subtarget->isGP64bit() ? 14 : 6);
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}
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OutStreamer->SwitchSection(PrevSection);
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}
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Sleds.clear();
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}
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void MipsAsmPrinter::LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr &MI) {
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EmitSled(MI, SledKind::FUNCTION_ENTER);
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}
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void MipsAsmPrinter::LowerPATCHABLE_FUNCTION_EXIT(const MachineInstr &MI) {
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EmitSled(MI, SledKind::FUNCTION_EXIT);
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}
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void MipsAsmPrinter::LowerPATCHABLE_TAIL_CALL(const MachineInstr &MI) {
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EmitSled(MI, SledKind::TAIL_CALL);
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}
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void MipsAsmPrinter::PrintDebugValueComment(const MachineInstr *MI,
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raw_ostream &OS) {
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// TODO: implement
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@ -35,7 +35,21 @@ class LLVM_LIBRARY_VISIBILITY MipsAsmPrinter : public AsmPrinter {
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void EmitInstrWithMacroNoAT(const MachineInstr *MI);
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//===------------------------------------------------------------------===//
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// XRay implementation
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//===------------------------------------------------------------------===//
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public:
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// XRay-specific lowering for Mips.
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void LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr &MI);
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void LowerPATCHABLE_FUNCTION_EXIT(const MachineInstr &MI);
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void LowerPATCHABLE_TAIL_CALL(const MachineInstr &MI);
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// Helper function that emits the XRay sleds we've collected for a particular
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// function.
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void EmitXRayTable();
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private:
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void EmitSled(const MachineInstr &MI, SledKind Kind);
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// tblgen'erated function.
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bool emitPseudoExpansionLowering(MCStreamer &OutStreamer,
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const MachineInstr *MI);
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@ -236,6 +236,7 @@ public:
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return (HasSym32 && isABI_N64()) || isABI_N32() || isABI_O32();
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}
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bool isSingleFloat() const { return IsSingleFloat; }
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bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }
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bool hasVFPU() const { return HasVFPU; }
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bool inMips16Mode() const { return InMips16Mode; }
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bool inMips16ModeDefault() const {
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@ -277,6 +278,8 @@ public:
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bool isTargetNaCl() const { return TargetTriple.isOSNaCl(); }
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bool isXRaySupported() const override { return true; }
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// for now constant islands are on for the whole compilation unit but we only
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// really use them if in addition we are in mips16 mode
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static bool useConstantIslands();
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147
test/CodeGen/Mips/xray-mips-attribute-instrumentation.ll
Normal file
147
test/CodeGen/Mips/xray-mips-attribute-instrumentation.ll
Normal file
@ -0,0 +1,147 @@
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; RUN: llc -filetype=asm -o - -mtriple=mips-unknown-linux-gnu < %s | FileCheck --check-prefix=CHECK --check-prefix=CHECK-MIPS32 %s
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; RUN: llc -filetype=asm -o - -mtriple=mipsel-unknown-linux-gnu < %s | FileCheck --check-prefix=CHECK --check-prefix=CHECK-MIPS32 %s
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; RUN: llc -filetype=asm -o - -mtriple=mips64-unknown-linux-gnu < %s | FileCheck --check-prefix=CHECK --check-prefix=CHECK-MIPS64 %s
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; RUN: llc -filetype=asm -o - -mtriple=mips64el-unknown-linux-gnu < %s | FileCheck --check-prefix=CHECK --check-prefix=CHECK-MIPS64 %s
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define i32 @foo() nounwind noinline uwtable "function-instrument"="xray-always" {
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; CHECK: .p2align 2
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; CHECK-MIPS64-LABEL: .Lxray_sled_0:
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; CHECK-MIPS32-LABEL: $xray_sled_0:
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; CHECK-MIPS64: b .Ltmp0
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; CHECK-MIPS32: b $tmp0
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-MIPS64: nop
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; CHECK-MIPS64: nop
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; CHECK-MIPS64: nop
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; CHECK-MIPS64: nop
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; CHECK-MIPS64-LABEL: .Ltmp0:
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; CHECK-MIPS32-LABEL: $tmp0:
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; CHECK-MIPS32: addiu $25, $25, 52
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ret i32 0
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; CHECK: .p2align 2
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; CHECK-MIPS64-LABEL: .Lxray_sled_1:
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; CHECK-MIPS32-LABEL: $xray_sled_1:
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; CHECK-MIPS64: b .Ltmp1
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; CHECK-MIPS32: b $tmp1
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-MIPS64: nop
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; CHECK-MIPS64: nop
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; CHECK-MIPS64: nop
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; CHECK-MIPS64: nop
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; CHECK-MIPS64-LABEL: .Ltmp1:
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; CHECK-MIPS32-LABEL: $tmp1:
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; CHECK-MIPS32: addiu $25, $25, 52
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}
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; CHECK: .section xray_instr_map,{{.*}}
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; CHECK-MIPS64: .8byte .Lxray_sled_0
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; CHECK-MIPS64: .8byte .Lxray_sled_1
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; CHECK-MIPS32: .4byte ($xray_sled_0)
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; CHECK-MIPS32: .4byte ($xray_sled_1)
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; We test multiple returns in a single function to make sure we're getting all
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; of them with XRay instrumentation.
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define i32 @bar(i32 %i) nounwind noinline uwtable "function-instrument"="xray-always" {
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; CHECK: .p2align 2
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; CHECK-MIPS64-LABEL: .Lxray_sled_2:
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; CHECK-MIPS32-LABEL: $xray_sled_2:
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; CHECK-MIPS64: b .Ltmp2
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; CHECK-MIPS32: b $tmp2
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-MIPS64: nop
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; CHECK-MIPS64: nop
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; CHECK-MIPS64: nop
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; CHECK-MIPS64: nop
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; CHECK-MIPS64-LABEL: .Ltmp2:
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; CHECK-MIPS32-LABEL: $tmp2:
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; CHECK-MIPS32: addiu $25, $25, 52
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Test:
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%cond = icmp eq i32 %i, 0
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br i1 %cond, label %IsEqual, label %NotEqual
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IsEqual:
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ret i32 0
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; CHECK: .p2align 2
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; CHECK-MIPS64-LABEL: .Lxray_sled_3:
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; CHECK-MIPS32-LABEL: $xray_sled_3:
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; CHECK-MIPS64: b .Ltmp3
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; CHECK-MIPS32: b $tmp3
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-MIPS64: nop
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; CHECK-MIPS64: nop
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; CHECK-MIPS64: nop
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; CHECK-MIPS64: nop
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; CHECK-MIPS64-LABEL: .Ltmp3:
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; CHECK-MIPS32-LABEL: $tmp3:
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; CHECK-MIPS32: addiu $25, $25, 52
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NotEqual:
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ret i32 1
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; CHECK: .p2align 2
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; CHECK-MIPS64-LABEL: .Lxray_sled_4:
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; CHECK-MIPS32-LABEL: $xray_sled_4:
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; CHECK-MIPS64: b .Ltmp4
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; CHECK-MIPS32: b $tmp4
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-MIPS64: nop
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; CHECK-MIPS64: nop
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; CHECK-MIPS64: nop
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; CHECK-MIPS64: nop
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; CHECK-MIPS64-LABEL: .Ltmp4:
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||||
; CHECK-MIPS32-LABEL: $tmp4:
|
||||
; CHECK-MIPS32: addiu $25, $25, 52
|
||||
}
|
||||
; CHECK: .section xray_instr_map,{{.*}}
|
||||
; CHECK-MIPS64: .8byte .Lxray_sled_2
|
||||
; CHECK-MIPS64: .8byte .Lxray_sled_3
|
||||
; CHECK-MIPS64: .8byte .Lxray_sled_4
|
||||
; CHECK-MIPS32: .4byte ($xray_sled_2)
|
||||
; CHECK-MIPS32: .4byte ($xray_sled_3)
|
||||
; CHECK-MIPS32: .4byte ($xray_sled_4)
|
||||
31
test/CodeGen/Mips/xray-section-group.ll
Normal file
31
test/CodeGen/Mips/xray-section-group.ll
Normal file
@ -0,0 +1,31 @@
|
||||
; RUN: llc -filetype=asm -o - -mtriple=mips-unknown-linux-gnu -function-sections < %s | FileCheck %s
|
||||
; RUN: llc -filetype=asm -o - -mtriple=mipsel-unknown-linux-gnu -function-sections < %s | FileCheck %s
|
||||
; RUN: llc -filetype=obj -o %t -mtriple=mips-unknown-linux-gnu -function-sections < %s
|
||||
; RUN: llvm-readobj -sections %t | FileCheck %s --check-prefix=CHECK-OBJ
|
||||
; RUN: llc -filetype=obj -o %t -mtriple=mipsel-unknown-linux-gnu -function-sections < %s
|
||||
; RUN: llvm-readobj -sections %t | FileCheck %s --check-prefix=CHECK-OBJ
|
||||
; RUN: llc -filetype=asm -o - -mtriple=mips64-unknown-linux-gnu -function-sections < %s | FileCheck %s
|
||||
; RUN: llc -filetype=asm -o - -mtriple=mips64el-unknown-linux-gnu -function-sections < %s | FileCheck %s
|
||||
; RUN: llc -filetype=obj -o %t -mtriple=mips64-unknown-linux-gnu -function-sections < %s
|
||||
; RUN: llvm-readobj -sections %t | FileCheck %s --check-prefix=CHECK-OBJ
|
||||
; RUN: llc -filetype=obj -o %t -mtriple=mips64el-unknown-linux-gnu -function-sections < %s
|
||||
; RUN: llvm-readobj -sections %t | FileCheck %s --check-prefix=CHECK-OBJ
|
||||
|
||||
define i32 @foo() nounwind noinline uwtable "function-instrument"="xray-always" {
|
||||
; CHECK: .section .text.foo,"ax",@progbits
|
||||
ret i32 0
|
||||
; CHECK: .section xray_instr_map,"a",@progbits
|
||||
}
|
||||
|
||||
; CHECK-OBJ: Section {
|
||||
; CHECK-OBJ: Name: xray_instr_map
|
||||
|
||||
$bar = comdat any
|
||||
define i32 @bar() nounwind noinline uwtable "function-instrument"="xray-always" comdat($bar) {
|
||||
; CHECK: .section .text.bar,"axG",@progbits,bar,comdat
|
||||
ret i32 1
|
||||
; CHECK: .section xray_instr_map,"aG",@progbits,bar,comdat
|
||||
}
|
||||
|
||||
; CHECK-OBJ: Section {
|
||||
; CHECK-OBJ: Name: xray_instr_map
|
||||
Loading…
Reference in New Issue
Block a user