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https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-24 11:42:57 +01:00
Printer.cpp: Ditch addRequired/getAnalysis, because they leave
Printer::doFinalization() out in the cold. Now we pass in a TargetMachine to Printer's constructor and get the TargetData from the TargetMachine. Don't pass TargetMachine or MRegisterInfo objects around in the Printer. Constify TargetData references. X86.h: Update comment and prototype of createX86CodePrinterPass(). X86TargetMachine.cpp: Update callers of createX86CodePrinterPass(). llvm-svn: 7275
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@ -33,11 +33,16 @@ namespace {
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std::set<const Value *> MangledGlobals;
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struct Printer : public MachineFunctionPass {
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/// Output stream on which we're printing assembly code. This is
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/// assigned by the constructor and never changes.
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/// Output stream on which we're printing assembly code.
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///
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std::ostream &O;
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Printer(std::ostream &o) : O(o) { }
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/// Target machine description which we query for reg. names, data
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/// layout, etc.
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///
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TargetMachine &TM;
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Printer(std::ostream &o, TargetMachine &tm) : O(o), TM(tm) { }
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/// We name each basic block in a Function with a unique number, so
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/// that we can consistently refer to them later. This is cleared
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@ -55,17 +60,11 @@ namespace {
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virtual const char *getPassName() const {
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return "X86 Assembly Printer";
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}
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequired<TargetData>();
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}
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void printMachineInstruction(const MachineInstr *MI,
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const TargetMachine &TM) const;
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void printMachineInstruction(const MachineInstr *MI) const;
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void printOp(const MachineOperand &MO,
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const MRegisterInfo &RI, bool elideOffsetKeyword = false) const;
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void printMemReference(const MachineInstr *MI,
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unsigned Op,
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const MRegisterInfo &RI) const;
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bool elideOffsetKeyword = false) const;
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void printMemReference(const MachineInstr *MI, unsigned Op) const;
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void printConstantPool(MachineConstantPool *MCP);
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bool runOnMachineFunction(MachineFunction &F);
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std::string ConstantExprToString(const ConstantExpr* CE);
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@ -79,11 +78,12 @@ namespace {
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} // end of anonymous namespace
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/// createX86CodePrinterPass - Returns a pass that prints the X86
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/// assembly code for a MachineFunction to the specified stream. This
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/// should work regardless of whether the function is in SSA form.
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/// assembly code for a MachineFunction to the given output stream,
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/// using the given target machine description. This should work
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/// regardless of whether the function is in SSA form.
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///
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Pass *createX86CodePrinterPass(std::ostream &O) {
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return new Printer(O);
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Pass *createX86CodePrinterPass(std::ostream &o, TargetMachine &tm) {
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return new Printer(o, tm);
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}
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/// makeNameProper - We don't want identifier names with ., space, or
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@ -166,7 +166,7 @@ std::string Printer::valToExprString(const Value* V) {
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///
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std::string Printer::ConstantExprToString(const ConstantExpr* CE) {
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std::string S;
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TargetData &TD = getAnalysis<TargetData>();
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const TargetData &TD = TM.getTargetData();
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switch(CE->getOpcode()) {
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case Instruction::GetElementPtr:
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{ // generate a symbolic expression for the byte address
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@ -359,7 +359,7 @@ Printer::printConstantValueOnly(const Constant* CV,
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int numPadBytesAfter /* = 0 */)
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{
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const ConstantArray *CVA = dyn_cast<ConstantArray>(CV);
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TargetData &TD = getAnalysis<TargetData>();
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const TargetData &TD = TM.getTargetData();
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if (CVA && isStringCompatible(CVA))
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{ // print the string alone and return
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@ -418,7 +418,7 @@ Printer::printConstantValueOnly(const Constant* CV,
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///
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void Printer::printConstantPool(MachineConstantPool *MCP){
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const std::vector<Constant*> &CP = MCP->getConstants();
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TargetData &TD = getAnalysis<TargetData>();
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const TargetData &TD = TM.getTargetData();
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if (CP.empty()) return;
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@ -439,7 +439,6 @@ bool Printer::runOnMachineFunction(MachineFunction &MF) {
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// BBNumber is used here so that a given Printer will never give two
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// BBs the same name. (If you have a better way, please let me know!)
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static unsigned BBNumber = 0;
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const TargetMachine &TM = MF.getTarget();
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// What's my mangled name?
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CurrentFnName = getValueName(MF.getFunction());
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@ -472,7 +471,7 @@ bool Printer::runOnMachineFunction(MachineFunction &MF) {
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II != E; ++II) {
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// Print the assembly for the instruction.
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O << "\t";
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printMachineInstruction(*II, TM);
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printMachineInstruction(*II);
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}
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}
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@ -495,8 +494,8 @@ static bool isMem(const MachineInstr *MI, unsigned Op) {
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}
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void Printer::printOp(const MachineOperand &MO,
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const MRegisterInfo &RI,
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bool elideOffsetKeyword /* = false */) const {
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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switch (MO.getType()) {
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case MachineOperand::MO_VirtualRegister:
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if (Value *V = MO.getVRegValueOrNull()) {
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@ -547,9 +546,8 @@ static const std::string sizePtr(const TargetInstrDescriptor &Desc) {
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}
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}
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void Printer::printMemReference(const MachineInstr *MI,
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unsigned Op,
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const MRegisterInfo &RI) const {
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void Printer::printMemReference(const MachineInstr *MI, unsigned Op) const {
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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assert(isMem(MI, Op) && "Invalid memory reference!");
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if (MI->getOperand(Op).isFrameIndex()) {
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@ -575,7 +573,7 @@ void Printer::printMemReference(const MachineInstr *MI,
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O << "[";
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bool NeedPlus = false;
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if (BaseReg.getReg()) {
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printOp(BaseReg, RI);
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printOp(BaseReg);
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NeedPlus = true;
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}
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@ -583,7 +581,7 @@ void Printer::printMemReference(const MachineInstr *MI,
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if (NeedPlus) O << " + ";
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if (ScaleVal != 1)
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O << ScaleVal << "*";
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printOp(IndexReg, RI);
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printOp(IndexReg);
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NeedPlus = true;
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}
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@ -601,11 +599,9 @@ void Printer::printMemReference(const MachineInstr *MI,
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}
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/// printMachineInstruction -- Print out a single X86 LLVM instruction
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/// MI in Intel syntax to the current output stream, using the given
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/// TargetMachine.
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/// MI in Intel syntax to the current output stream.
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///
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void Printer::printMachineInstruction(const MachineInstr *MI,
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const TargetMachine &TM) const {
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void Printer::printMachineInstruction(const MachineInstr *MI) const {
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unsigned Opcode = MI->getOpcode();
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const TargetInstrInfo &TII = TM.getInstrInfo();
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const TargetInstrDescriptor &Desc = TII.get(Opcode);
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@ -618,21 +614,21 @@ void Printer::printMachineInstruction(const MachineInstr *MI,
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// seen by the assembler (e.g., IMPLICIT_USEs.)
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O << "# ";
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if (Opcode == X86::PHI) {
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printOp(MI->getOperand(0), RI);
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printOp(MI->getOperand(0));
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O << " = phi ";
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for (unsigned i = 1, e = MI->getNumOperands(); i != e; i+=2) {
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if (i != 1) O << ", ";
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O << "[";
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printOp(MI->getOperand(i), RI);
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printOp(MI->getOperand(i));
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O << ", ";
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printOp(MI->getOperand(i+1), RI);
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printOp(MI->getOperand(i+1));
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O << "]";
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}
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} else {
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unsigned i = 0;
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if (MI->getNumOperands() && (MI->getOperand(0).opIsDefOnly() ||
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MI->getOperand(0).opIsDefAndUse())) {
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printOp(MI->getOperand(0), RI);
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printOp(MI->getOperand(0));
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O << " = ";
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++i;
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}
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@ -642,7 +638,7 @@ void Printer::printMachineInstruction(const MachineInstr *MI,
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O << " ";
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if (MI->getOperand(i).opIsDefOnly() ||
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MI->getOperand(i).opIsDefAndUse()) O << "*";
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printOp(MI->getOperand(i), RI);
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printOp(MI->getOperand(i));
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if (MI->getOperand(i).opIsDefOnly() ||
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MI->getOperand(i).opIsDefAndUse()) O << "*";
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}
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@ -665,7 +661,7 @@ void Printer::printMachineInstruction(const MachineInstr *MI,
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O << TII.getName(MI->getOpcode()) << " ";
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if (MI->getNumOperands() == 1) {
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printOp(MI->getOperand(0), RI, true); // Don't print "OFFSET"...
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printOp(MI->getOperand(0), true); // Don't print "OFFSET"...
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}
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O << "\n";
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return;
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@ -692,14 +688,14 @@ void Printer::printMachineInstruction(const MachineInstr *MI,
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unsigned Reg = MI->getOperand(0).getReg();
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O << TII.getName(MI->getOpCode()) << " ";
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printOp(MI->getOperand(0), RI);
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printOp(MI->getOperand(0));
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if (MI->getNumOperands() == 2 &&
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(!MI->getOperand(1).isRegister() ||
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MI->getOperand(1).getVRegValueOrNull() ||
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MI->getOperand(1).isGlobalAddress() ||
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MI->getOperand(1).isExternalSymbol())) {
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O << ", ";
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printOp(MI->getOperand(1), RI);
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printOp(MI->getOperand(1));
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}
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if (Desc.TSFlags & X86II::PrintImplUses) {
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for (const unsigned *p = Desc.ImplicitUses; *p; ++p) {
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@ -733,12 +729,12 @@ void Printer::printMachineInstruction(const MachineInstr *MI,
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&& "Bad format for MRMDestReg!");
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O << TII.getName(MI->getOpCode()) << " ";
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printOp(MI->getOperand(0), RI);
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printOp(MI->getOperand(0));
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O << ", ";
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printOp(MI->getOperand(1+isTwoAddr), RI);
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printOp(MI->getOperand(1+isTwoAddr));
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if (MI->getNumOperands() == 4) {
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O << ", ";
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printOp(MI->getOperand(3), RI);
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printOp(MI->getOperand(3));
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}
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O << "\n";
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return;
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@ -752,9 +748,9 @@ void Printer::printMachineInstruction(const MachineInstr *MI,
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MI->getOperand(4).isRegister() && "Bad format for MRMDestMem!");
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O << TII.getName(MI->getOpCode()) << " " << sizePtr(Desc) << " ";
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printMemReference(MI, 0, RI);
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printMemReference(MI, 0);
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O << ", ";
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printOp(MI->getOperand(4), RI);
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printOp(MI->getOperand(4));
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O << "\n";
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return;
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}
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@ -779,9 +775,9 @@ void Printer::printMachineInstruction(const MachineInstr *MI,
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O << "**";
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O << TII.getName(MI->getOpCode()) << " ";
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printOp(MI->getOperand(0), RI);
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printOp(MI->getOperand(0));
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O << ", ";
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printOp(MI->getOperand(MI->getNumOperands()-1), RI);
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printOp(MI->getOperand(MI->getNumOperands()-1));
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O << "\n";
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return;
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}
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@ -800,9 +796,9 @@ void Printer::printMachineInstruction(const MachineInstr *MI,
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O << "**";
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O << TII.getName(MI->getOpCode()) << " ";
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printOp(MI->getOperand(0), RI);
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printOp(MI->getOperand(0));
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O << ", " << sizePtr(Desc) << " ";
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printMemReference(MI, MI->getNumOperands()-4, RI);
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printMemReference(MI, MI->getNumOperands()-4);
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O << "\n";
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return;
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}
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@ -831,10 +827,10 @@ void Printer::printMachineInstruction(const MachineInstr *MI,
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O << "**";
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O << TII.getName(MI->getOpCode()) << " ";
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printOp(MI->getOperand(0), RI);
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printOp(MI->getOperand(0));
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if (MI->getOperand(MI->getNumOperands()-1).isImmediate()) {
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O << ", ";
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printOp(MI->getOperand(MI->getNumOperands()-1), RI);
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printOp(MI->getOperand(MI->getNumOperands()-1));
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}
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if (Desc.TSFlags & X86II::PrintImplUses) {
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for (const unsigned *p = Desc.ImplicitUses; *p; ++p) {
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@ -926,20 +922,20 @@ void Printer::printMachineInstruction(const MachineInstr *MI,
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// expecting to see.
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if (MI->getOpCode() == X86::FISTPr64) {
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O << "fistpll DWORD PTR ";
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printMemReference(MI, 0, RI);
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printMemReference(MI, 0);
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if (MI->getNumOperands() == 5) {
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O << ", ";
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printOp(MI->getOperand(4), RI);
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printOp(MI->getOperand(4));
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}
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O << "\t# ";
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}
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O << TII.getName(MI->getOpCode()) << " ";
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O << sizePtr(Desc) << " ";
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printMemReference(MI, 0, RI);
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printMemReference(MI, 0);
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if (MI->getNumOperands() == 5) {
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O << ", ";
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printOp(MI->getOperand(4), RI);
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printOp(MI->getOperand(4));
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}
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O << "\n";
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return;
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@ -988,7 +984,7 @@ static const Function *isConstantFunctionPointerRef(const Constant *C) {
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bool Printer::doFinalization(Module &M)
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{
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TargetData &TD = getAnalysis<TargetData>();
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const TargetData &TD = TM.getTargetData();
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// Print out module-level global variables here.
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for (Module::const_giterator I = M.gbegin(), E = M.gend(); I != E; ++I) {
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std::string name(getValueName(I));
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@ -29,11 +29,12 @@ Pass *createX86PeepholeOptimizerPass();
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///
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Pass *createX86FloatingPointStackifierPass();
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/// createX86CodePrinterPass - Print out the specified machine code function to
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/// the specified stream. This function should work regardless of whether or
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/// not the function is in SSA form or not.
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/// createX86CodePrinterPass - Returns a pass that prints the X86
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/// assembly code for a MachineFunction to the given output stream,
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/// using the given target machine description. This should work
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/// regardless of whether the function is in SSA form.
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///
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Pass *createX86CodePrinterPass(std::ostream &O);
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Pass *createX86CodePrinterPass(std::ostream &o, TargetMachine &tm);
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/// X86EmitCodeToMemory - This function converts a register allocated function
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/// into raw machine code in a dynamically allocated chunk of memory. A pointer
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@ -50,7 +50,7 @@ bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM,
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PM.add(createX86FloatingPointStackifierPass());
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PM.add(createPrologEpilogCodeInserter());
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PM.add(createX86PeepholeOptimizerPass());
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PM.add(createX86CodePrinterPass(Out));
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PM.add(createX86CodePrinterPass(Out, *this));
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return false; // success!
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}
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@ -92,7 +92,7 @@ bool X86TargetMachine::addPassesToJITCompile(PassManager &PM) {
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PM.add(createX86PeepholeOptimizerPass());
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if (PrintCode) // Print the register-allocated code
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PM.add(createX86CodePrinterPass(std::cerr));
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PM.add(createX86CodePrinterPass(std::cerr, *this));
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return false; // success!
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}
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