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[Alignment][NFC] Migrate TargetLowering::allowsMemoryAccess

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Summary:
Note to downstream target maintainers: this might silently change the semantics of your code if you override `TargetLowering::allowsMemoryAccess` without marking it override.

This patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81379
This commit is contained in:
Guillaume Chatelet 2020-06-08 11:47:11 +00:00
parent 0393b31870
commit 574b28f02f
5 changed files with 19 additions and 16 deletions
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2
include/llvm/CodeGen/TargetLowering.h
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@ -1609,7 +1609,7 @@ public:
/// target).
virtual bool
allowsMemoryAccess(LLVMContext &Context, const DataLayout &DL, EVT VT,
unsigned AddrSpace = 0, unsigned Alignment = 1,
unsigned AddrSpace = 0, Align Alignment = Align(1),
MachineMemOperand::Flags Flags = MachineMemOperand::MONone,
bool *Fast = nullptr) const;

4
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -4862,7 +4862,7 @@ bool DAGCombiner::isLegalNarrowLdSt(LSBaseSDNode *LDST,
// Ensure that this isn't going to produce an unsupported memory access.
if (ShAmt &&
!TLI.allowsMemoryAccess(*DAG.getContext(), DAG.getDataLayout(), MemVT,
LDST->getAddressSpace(), ShAmt / 8,
LDST->getAddressSpace(), Align(ShAmt / 8),
LDST->getMemOperand()->getFlags()))
return false;
@ -8478,7 +8478,7 @@ SDValue DAGCombiner::visitFunnelShift(SDNode *N) {
SDLoc DL(RHS);
uint64_t PtrOff =
IsFSHL ? (((BitWidth - ShAmt) % BitWidth) / 8) : (ShAmt / 8);
unsigned NewAlign = MinAlign(RHS->getAlignment(), PtrOff);
const Align NewAlign = commonAlignment(RHS->getAlign(), PtrOff);
bool Fast = false;
if (TLI.allowsMemoryAccess(*DAG.getContext(), DAG.getDataLayout(), VT,
RHS->getAddressSpace(), NewAlign,

16
lib/CodeGen/TargetLoweringBase.cpp
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@ -1599,19 +1599,21 @@ bool TargetLoweringBase::allowsMemoryAccessForAlignment(
Fast);
}
bool TargetLoweringBase::allowsMemoryAccess(
LLVMContext &Context, const DataLayout &DL, EVT VT, unsigned AddrSpace,
unsigned Alignment, MachineMemOperand::Flags Flags, bool *Fast) const {
return allowsMemoryAccessForAlignment(Context, DL, VT, AddrSpace, Alignment,
Flags, Fast);
bool TargetLoweringBase::allowsMemoryAccess(LLVMContext &Context,
const DataLayout &DL, EVT VT,
unsigned AddrSpace, Align Alignment,
MachineMemOperand::Flags Flags,
bool *Fast) const {
return allowsMemoryAccessForAlignment(Context, DL, VT, AddrSpace,
Alignment.value(), Flags, Fast);
}
bool TargetLoweringBase::allowsMemoryAccess(LLVMContext &Context,
const DataLayout &DL, EVT VT,
const MachineMemOperand &MMO,
bool *Fast) const {
return allowsMemoryAccess(Context, DL, VT, MMO.getAddrSpace(),
MMO.getAlign().value(), MMO.getFlags(), Fast);
return allowsMemoryAccess(Context, DL, VT, MMO.getAddrSpace(), MMO.getAlign(),
MMO.getFlags(), Fast);
}
BranchProbability TargetLoweringBase::getPredictableBranchThreshold() const {

8
lib/Target/Hexagon/HexagonISelLowering.cpp
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@ -3385,12 +3385,12 @@ EVT HexagonTargetLowering::getOptimalMemOpType(
return MVT::Other;
}
bool HexagonTargetLowering::allowsMemoryAccess(LLVMContext &Context,
const DataLayout &DL, EVT VT, unsigned AddrSpace, unsigned Alignment,
MachineMemOperand::Flags Flags, bool *Fast) const {
bool HexagonTargetLowering::allowsMemoryAccess(
LLVMContext &Context, const DataLayout &DL, EVT VT, unsigned AddrSpace,
Align Alignment, MachineMemOperand::Flags Flags, bool *Fast) const {
MVT SVT = VT.getSimpleVT();
if (Subtarget.isHVXVectorType(SVT, true))
return allowsHvxMemoryAccess(SVT, Alignment, Flags, Fast);
return allowsHvxMemoryAccess(SVT, Alignment.value(), Flags, Fast);
return TargetLoweringBase::allowsMemoryAccess(
Context, DL, VT, AddrSpace, Alignment, Flags, Fast);
}

5
lib/Target/Hexagon/HexagonISelLowering.h
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@ -306,8 +306,9 @@ namespace HexagonISD {
const AttributeList &FuncAttributes) const override;
bool allowsMemoryAccess(LLVMContext &Context, const DataLayout &DL, EVT VT,
unsigned AddrSpace, unsigned Alignment, MachineMemOperand::Flags Flags,
bool *Fast) const override;
unsigned AddrSpace, Align Alignment,
MachineMemOperand::Flags Flags,
bool *Fast) const override;
bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AddrSpace,
unsigned Alignment, MachineMemOperand::Flags Flags, bool *Fast)