mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-24 03:33:20 +01:00
When lowering certain atomics, we need to copy the memoperand from the old
atomic operation to the new one. llvm-svn: 53714
This commit is contained in:
parent
41aeb22c1d
commit
57cd9d6e5a
@ -6010,7 +6010,9 @@ X86TargetLowering::EmitAtomicBitwiseWithCustomInserter(MachineInstr *bInstr,
|
||||
for (int i=0; i <= lastAddrIndx; ++i)
|
||||
(*MIB).addOperand(*argOpers[i]);
|
||||
MIB.addReg(t2);
|
||||
|
||||
assert(bInstr->hasOneMemOperand() && "Unexpected number of memoperand");
|
||||
(*MIB).addMemOperand(*F, *bInstr->memoperands_begin());
|
||||
|
||||
MIB = BuildMI(newMBB, TII->get(X86::MOV32rr), destOper.getReg());
|
||||
MIB.addReg(X86::EAX);
|
||||
|
||||
@ -6107,6 +6109,8 @@ X86TargetLowering::EmitAtomicMinMaxWithCustomInserter(MachineInstr *mInstr,
|
||||
for (int i=0; i <= lastAddrIndx; ++i)
|
||||
(*MIB).addOperand(*argOpers[i]);
|
||||
MIB.addReg(t3);
|
||||
assert(mInstr->hasOneMemOperand() && "Unexpected number of memoperand");
|
||||
(*MIB).addMemOperand(*F, *mInstr->memoperands_begin());
|
||||
|
||||
MIB = BuildMI(newMBB, TII->get(X86::MOV32rr), destOper.getReg());
|
||||
MIB.addReg(X86::EAX);
|
||||
|
Loading…
Reference in New Issue
Block a user