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AMDGPU: Fix assert on n inline asm constraint

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llvm-svn: 310515
This commit is contained in:
Matt Arsenault 2017-08-09 20:09:35 +00:00
parent 25cf33c6db
commit 57ceceb3a7
2 changed files with 31 additions and 6 deletions
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19
lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
View File

@ -1017,20 +1017,29 @@ void AMDGPUAsmPrinter::getAmdKernelCode(amd_kernel_code_t &Out,
bool AMDGPUAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
unsigned AsmVariant,
const char *ExtraCode, raw_ostream &O) {
// First try the generic code, which knows about modifiers like 'c' and 'n'.
if (!AsmPrinter::PrintAsmOperand(MI, OpNo, AsmVariant, ExtraCode, O))
return false;
if (ExtraCode && ExtraCode[0]) {
if (ExtraCode[1] != 0)
return true; // Unknown modifier.
switch (ExtraCode[0]) {
default:
// See if this is a generic print operand
return AsmPrinter::PrintAsmOperand(MI, OpNo, AsmVariant, ExtraCode, O);
case 'r':
break;
default:
return true;
}
}
AMDGPUInstPrinter::printRegOperand(MI->getOperand(OpNo).getReg(), O,
*TM.getSubtargetImpl(*MF->getFunction())->getRegisterInfo());
// TODO: Should be able to support other operand types like globals.
const MachineOperand &MO = MI->getOperand(OpNo);
if (MO.isReg()) {
AMDGPUInstPrinter::printRegOperand(MO.getReg(), O,
*MF->getSubtarget().getRegisterInfo());
return false;
}
return true;
}

16
test/CodeGen/AMDGPU/inline-asm.ll
View File

@ -246,3 +246,19 @@ entry:
store i32 %add, i32 addrspace(1)* undef
ret void
}
; CHECK-LABEL: {{^}}asm_constraint_c_n:
; CHECK: s_trap 10{{$}}
define amdgpu_kernel void @asm_constraint_c_n() {
entry:
tail call void asm sideeffect "s_trap ${0:c}", "n"(i32 10) #1
ret void
}
; CHECK-LABEL: {{^}}asm_constraint_n_n:
; CHECK: s_trap -10{{$}}
define amdgpu_kernel void @asm_constraint_n_n() {
entry:
tail call void asm sideeffect "s_trap ${0:n}", "n"(i32 10) #1
ret void
}