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[X86] Fix the immediate size to match the address size in the operand types for the move to/from absolute memory instructions.

llvm-svn: 225152
This commit is contained in:
Craig Topper 2015-01-05 08:18:59 +00:00
parent 44b2a9bdec
commit 57d6386f23

View File

@ -554,31 +554,31 @@ def dstidx64 : Operand<iPTR> {
let PrintMethod = "printDstIdx64"; }
def offset16_8 : Operand<iPTR> {
let ParserMatchClass = X86MemOffs16_8AsmOperand;
let MIOperandInfo = (ops i64imm, i8imm);
let MIOperandInfo = (ops i16imm, i8imm);
let PrintMethod = "printMemOffs8"; }
def offset16_16 : Operand<iPTR> {
let ParserMatchClass = X86MemOffs16_16AsmOperand;
let MIOperandInfo = (ops i64imm, i8imm);
let MIOperandInfo = (ops i16imm, i8imm);
let PrintMethod = "printMemOffs16"; }
def offset16_32 : Operand<iPTR> {
let ParserMatchClass = X86MemOffs16_32AsmOperand;
let MIOperandInfo = (ops i64imm, i8imm);
let MIOperandInfo = (ops i16imm, i8imm);
let PrintMethod = "printMemOffs32"; }
def offset32_8 : Operand<iPTR> {
let ParserMatchClass = X86MemOffs32_8AsmOperand;
let MIOperandInfo = (ops i64imm, i8imm);
let MIOperandInfo = (ops i32imm, i8imm);
let PrintMethod = "printMemOffs8"; }
def offset32_16 : Operand<iPTR> {
let ParserMatchClass = X86MemOffs32_16AsmOperand;
let MIOperandInfo = (ops i64imm, i8imm);
let MIOperandInfo = (ops i32imm, i8imm);
let PrintMethod = "printMemOffs16"; }
def offset32_32 : Operand<iPTR> {
let ParserMatchClass = X86MemOffs32_32AsmOperand;
let MIOperandInfo = (ops i64imm, i8imm);
let MIOperandInfo = (ops i32imm, i8imm);
let PrintMethod = "printMemOffs32"; }
def offset32_64 : Operand<iPTR> {
let ParserMatchClass = X86MemOffs32_64AsmOperand;
let MIOperandInfo = (ops i64imm, i8imm);
let MIOperandInfo = (ops i32imm, i8imm);
let PrintMethod = "printMemOffs64"; }
def offset64_8 : Operand<iPTR> {
let ParserMatchClass = X86MemOffs64_8AsmOperand;