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Two changes relevant to LEA and x32:

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1) allows the use of RIP-relative addressing in 32-bit LEA instructions under
   x86-64 (ILP32 and LP64)
2) separates the size of address registers in 64-bit LEA instructions from
   control by ILP32/LP64.

llvm-svn: 174208
This commit is contained in:
David Sehr 2013-02-01 19:28:09 +00:00
parent 3f8178d398
commit 59597001bc
5 changed files with 58 additions and 3 deletions
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4
lib/Target/X86/X86InstrArithmetic.td
View File

@ -29,11 +29,11 @@ def LEA32r : I<0x8D, MRMSrcMem,
def LEA64_32r : I<0x8D, MRMSrcMem,
(outs GR32:$dst), (ins lea64_32mem:$src),
"lea{l}\t{$src|$dst}, {$dst|$src}",
[(set GR32:$dst, lea32addr:$src)], IIC_LEA>,
[(set GR32:$dst, lea64_32addr:$src)], IIC_LEA>,
Requires<[In64BitMode]>;
let isReMaterializable = 1 in
def LEA64r : RI<0x8D, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src),
def LEA64r : RI<0x8D, MRMSrcMem, (outs GR64:$dst), (ins lea64mem:$src),
"lea{q}\t{$src|$dst}, {$dst|$src}",
[(set GR64:$dst, lea64addr:$src)], IIC_LEA>;

13
lib/Target/X86/X86InstrInfo.td
View File

@ -525,6 +525,13 @@ def lea64_32mem : Operand<i32> {
let ParserMatchClass = X86MemAsmOperand;
}
// Memory operands that use 64-bit pointers in both ILP32 and LP64.
def lea64mem : Operand<i64> {
let PrintMethod = "printi64mem";
let MIOperandInfo = (ops GR64, i8imm, GR64_NOSP, i32imm, i8imm);
let ParserMatchClass = X86MemAsmOperand;
}
//===----------------------------------------------------------------------===//
// X86 Complex Pattern Definitions.
@ -535,6 +542,12 @@ def addr : ComplexPattern<iPTR, 5, "SelectAddr", [], [SDNPWantParent]>;
def lea32addr : ComplexPattern<i32, 5, "SelectLEAAddr",
[add, sub, mul, X86mul_imm, shl, or, frameindex],
[]>;
// In 64-bit mode 32-bit LEAs can use RIP-relative addressing.
def lea64_32addr : ComplexPattern<i32, 5, "SelectLEAAddr",
[add, sub, mul, X86mul_imm, shl, or,
frameindex, X86WrapperRIP],
[]>;
def tls32addr : ComplexPattern<i32, 5, "SelectTLSADDRAddr",
[tglobaltlsaddr], []>;

3
lib/Target/X86/X86MCInstLower.cpp
View File

@ -239,7 +239,8 @@ static void lower_lea64_32mem(MCInst *MI, unsigned OpNo) {
if (!MI->getOperand(OpNo+i).isReg()) continue;
unsigned Reg = MI->getOperand(OpNo+i).getReg();
if (Reg == 0) continue;
// LEAs can use RIP-relative addressing, and RIP has no sub/super register.
if (Reg == 0 || Reg == X86::RIP) continue;
MI->getOperand(OpNo+i).setReg(getX86SubSuperRegister(Reg, MVT::i64));
}

25
test/CodeGen/X86/imul64-lea.ll Normal file
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@ -0,0 +1,25 @@
; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-pc-linux-gnux32 | FileCheck %s
; Test that 64-bit LEAs are generated for both LP64 and ILP32 in 64-bit mode.
declare i64 @foo64()
define i64 @test64() {
%tmp.0 = tail call i64 @foo64( )
%tmp.1 = mul i64 %tmp.0, 9
; CHECK-NOT: mul
; CHECK: leaq
ret i64 %tmp.1
}
; Test that 32-bit LEAs are generated for both LP64 and ILP32 in 64-bit mode.
declare i32 @foo32()
define i32 @test32() {
%tmp.0 = tail call i32 @foo32( )
%tmp.1 = mul i32 %tmp.0, 9
; CHECK-NOT: mul
; CHECK: leal
ret i32 %tmp.1
}

16
test/CodeGen/X86/rip-rel-lea.ll Normal file
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@ -0,0 +1,16 @@
; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu -relocation-model=pic | FileCheck %s -check-prefix=PIC64
; RUN: llc < %s -mtriple=x86_64-pc-linux-gnux32 -relocation-model=pic | FileCheck %s -check-prefix=PICX32
; RUN: llc < %s -mtriple=i686-pc-linux-gnu -relocation-model=pic | FileCheck %s -check-prefix=PIC32
; Use %rip-relative addressing even in static mode on x86-64, because
; it has a smaller encoding.
@a = internal global double 3.4
define double* @foo() nounwind {
%a = getelementptr double* @a, i64 0
ret double* %a
; PIC64: leaq a(%rip)
; PICX32: leal a(%rip)
; PIC32: leal a@GOTOFF(%eax)
}