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Teach the local spiller to turn stack slot loads into register-register copies
when possible, avoiding the load (and avoiding the copy if the value is already in the right register). This patch came about when I noticed code like the following being generated: store R17 -> [SS1] ...blah... R4 = load [SS1] This was causing an LSU reject on the G5. This problem was due to the register allocator folding spill code into a reg-reg copy (producing the load), which prevented the spiller from being able to rewrite the load into a copy, despite the fact that the value was already available in a register. In the case above, we now rip out the R4 load and replace it with a R4 = R17 copy. This speeds up several programs on X86 (which spills a lot :) ), e.g. smg2k from 22.39->20.60s, povray from 12.93->12.66s, 168.wupwise from 68.54->53.83s (!), 197.parser from 7.33->6.62s (!), etc. This may have a larger impact in some cases on the G5 (by avoiding LSU rejects), though it probably won't trigger as often (less spilling in general). Targets that implement folding of loads/stores into copies should implement the isLoadFromStackSlot hook to get this. llvm-svn: 23388
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@ -466,36 +466,61 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) {
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<< I->second.second);
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unsigned VirtReg = I->second.first;
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VirtRegMap::ModRef MR = I->second.second;
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if (VRM.hasStackSlot(VirtReg)) {
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int SS = VRM.getStackSlot(VirtReg);
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DEBUG(std::cerr << " - StackSlot: " << SS << "\n");
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// If this reference is not a use, any previous store is now dead.
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// Otherwise, the store to this stack slot is not dead anymore.
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std::map<int, MachineInstr*>::iterator MDSI = MaybeDeadStores.find(SS);
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if (MDSI != MaybeDeadStores.end()) {
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if (MR & VirtRegMap::isRef) // Previous store is not dead.
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MaybeDeadStores.erase(MDSI);
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else {
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// If we get here, the store is dead, nuke it now.
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assert(MR == VirtRegMap::isMod && "Can't be modref!");
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MBB.erase(MDSI->second);
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MaybeDeadStores.erase(MDSI);
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++NumDSE;
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}
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}
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// If the spill slot value is available, and this is a new definition of
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// the value, the value is not available anymore.
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if (MR & VirtRegMap::isMod) {
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std::map<int, unsigned>::iterator It = SpillSlotsAvailable.find(SS);
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if (It != SpillSlotsAvailable.end()) {
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PhysRegsAvailable.erase(It->second);
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SpillSlotsAvailable.erase(It);
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}
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}
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} else {
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if (!VRM.hasStackSlot(VirtReg)) {
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DEBUG(std::cerr << ": No stack slot!\n");
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continue;
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}
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int SS = VRM.getStackSlot(VirtReg);
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DEBUG(std::cerr << " - StackSlot: " << SS << "\n");
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// If this folded instruction is just a use, check to see if it's a
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// straight load from the virt reg slot.
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if ((MR & VirtRegMap::isRef) && !(MR & VirtRegMap::isMod)) {
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int FrameIdx;
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if (unsigned DestReg = MRI->isLoadFromStackSlot(&MI, FrameIdx)) {
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// If this spill slot is available, insert a copy for it!
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std::map<int, unsigned>::iterator It = SpillSlotsAvailable.find(SS);
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if (FrameIdx == SS && It != SpillSlotsAvailable.end()) {
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DEBUG(std::cerr << "Promoted Load To Copy: " << MI);
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MachineFunction &MF = *MBB.getParent();
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if (DestReg != It->second) {
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MRI->copyRegToReg(MBB, &MI, DestReg, It->second,
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MF.getSSARegMap()->getRegClass(VirtReg));
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// Revisit the copy if the destination is a vreg.
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if (MRegisterInfo::isVirtualRegister(DestReg)) {
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NextMII = &MI;
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--NextMII; // backtrack to the copy.
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}
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}
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MBB.erase(&MI);
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goto ProcessNextInst;
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}
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}
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}
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// If this reference is not a use, any previous store is now dead.
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// Otherwise, the store to this stack slot is not dead anymore.
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std::map<int, MachineInstr*>::iterator MDSI = MaybeDeadStores.find(SS);
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if (MDSI != MaybeDeadStores.end()) {
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if (MR & VirtRegMap::isRef) // Previous store is not dead.
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MaybeDeadStores.erase(MDSI);
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else {
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// If we get here, the store is dead, nuke it now.
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assert(MR == VirtRegMap::isMod && "Can't be modref!");
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MBB.erase(MDSI->second);
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MaybeDeadStores.erase(MDSI);
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++NumDSE;
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}
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}
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// If the spill slot value is available, and this is a new definition of
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// the value, the value is not available anymore.
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if (MR & VirtRegMap::isMod) {
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std::map<int, unsigned>::iterator It = SpillSlotsAvailable.find(SS);
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if (It != SpillSlotsAvailable.end()) {
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PhysRegsAvailable.erase(It->second);
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SpillSlotsAvailable.erase(It);
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}
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}
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}
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@ -575,6 +600,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) {
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}
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}
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}
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ProcessNextInst:
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MII = NextMII;
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}
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}
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