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Revert accidentally-committed files in r300252.
llvm-svn: 300253
This commit is contained in:
Richard Smith
parent
4d5bff7ae0
commit
59f7e336f5
@ -1178,373 +1178,6 @@ Instruction *InstCombiner::foldICmpAddOpConst(Instruction &ICI,
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Constant *C = Builder->getInt(CI->getValue()-1);
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return new ICmpInst(ICmpInst::ICMP_SLT, X, ConstantExpr::getSub(SMax, C));
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}
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#if 0
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/// FoldICmpDivCst - Fold "icmp pred, ([su]div X, DivRHS), CmpRHS" where DivRHS
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/// and CmpRHS are both known to be integer constants.
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Instruction *InstCombiner::FoldICmpDivCst(ICmpInst &ICI, BinaryOperator *DivI,
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ConstantInt *DivRHS) {
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ConstantInt *CmpRHS = cast<ConstantInt>(ICI.getOperand(1));
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const APInt &CmpRHSV = CmpRHS->getValue();
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// FIXME: If the operand types don't match the type of the divide
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// then don't attempt this transform. The code below doesn't have the
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// logic to deal with a signed divide and an unsigned compare (and
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// vice versa). This is because (x /s C1) <s C2 produces different
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// results than (x /s C1) <u C2 or (x /u C1) <s C2 or even
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// (x /u C1) <u C2. Simply casting the operands and result won't
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// work. :( The if statement below tests that condition and bails
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// if it finds it.
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bool DivIsSigned = DivI->getOpcode() == Instruction::SDiv;
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if (!ICI.isEquality() && DivIsSigned != ICI.isSigned())
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return nullptr;
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if (DivRHS->isZero())
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return nullptr; // The ProdOV computation fails on divide by zero.
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if (DivIsSigned && DivRHS->isAllOnesValue())
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return nullptr; // The overflow computation also screws up here
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if (DivRHS->isOne()) {
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// This eliminates some funny cases with INT_MIN.
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ICI.setOperand(0, DivI->getOperand(0)); // X/1 == X.
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return &ICI;
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}
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// Compute Prod = CI * DivRHS. We are essentially solving an equation
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// of form X/C1=C2. We solve for X by multiplying C1 (DivRHS) and
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// C2 (CI). By solving for X we can turn this into a range check
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// instead of computing a divide.
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Constant *Prod = ConstantExpr::getMul(CmpRHS, DivRHS);
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// Determine if the product overflows by seeing if the product is
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// not equal to the divide. Make sure we do the same kind of divide
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// as in the LHS instruction that we're folding.
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bool ProdOV = (DivIsSigned ? ConstantExpr::getSDiv(Prod, DivRHS) :
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ConstantExpr::getUDiv(Prod, DivRHS)) != CmpRHS;
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// Get the ICmp opcode
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ICmpInst::Predicate Pred = ICI.getPredicate();
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/// If the division is known to be exact, then there is no remainder from the
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/// divide, so the covered range size is unit, otherwise it is the divisor.
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ConstantInt *RangeSize = DivI->isExact() ? getOne(Prod) : DivRHS;
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// Figure out the interval that is being checked. For example, a comparison
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// like "X /u 5 == 0" is really checking that X is in the interval [0, 5).
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// Compute this interval based on the constants involved and the signedness of
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// the compare/divide. This computes a half-open interval, keeping track of
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// whether either value in the interval overflows. After analysis each
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// overflow variable is set to 0 if it's corresponding bound variable is valid
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// -1 if overflowed off the bottom end, or +1 if overflowed off the top end.
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int LoOverflow = 0, HiOverflow = 0;
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Constant *LoBound = nullptr, *HiBound = nullptr;
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if (!DivIsSigned) { // udiv
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// e.g. X/5 op 3 --> [15, 20)
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LoBound = Prod;
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HiOverflow = LoOverflow = ProdOV;
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if (!HiOverflow) {
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// If this is not an exact divide, then many values in the range collapse
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// to the same result value.
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HiOverflow = AddWithOverflow(HiBound, LoBound, RangeSize, false);
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}
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} else if (DivRHS->getValue().isStrictlyPositive()) { // Divisor is > 0.
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if (CmpRHSV == 0) { // (X / pos) op 0
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// Can't overflow. e.g. X/2 op 0 --> [-1, 2)
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LoBound = ConstantExpr::getNeg(SubOne(RangeSize));
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HiBound = RangeSize;
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} else if (CmpRHSV.isStrictlyPositive()) { // (X / pos) op pos
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LoBound = Prod; // e.g. X/5 op 3 --> [15, 20)
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HiOverflow = LoOverflow = ProdOV;
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if (!HiOverflow)
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HiOverflow = AddWithOverflow(HiBound, Prod, RangeSize, true);
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} else { // (X / pos) op neg
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// e.g. X/5 op -3 --> [-15-4, -15+1) --> [-19, -14)
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HiBound = AddOne(Prod);
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LoOverflow = HiOverflow = ProdOV ? -1 : 0;
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if (!LoOverflow) {
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ConstantInt *DivNeg =cast<ConstantInt>(ConstantExpr::getNeg(RangeSize));
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LoOverflow = AddWithOverflow(LoBound, HiBound, DivNeg, true) ? -1 : 0;
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}
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}
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} else if (DivRHS->isNegative()) { // Divisor is < 0.
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if (DivI->isExact())
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RangeSize = cast<ConstantInt>(ConstantExpr::getNeg(RangeSize));
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if (CmpRHSV == 0) { // (X / neg) op 0
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// e.g. X/-5 op 0 --> [-4, 5)
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LoBound = AddOne(RangeSize);
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HiBound = cast<ConstantInt>(ConstantExpr::getNeg(RangeSize));
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if (HiBound == DivRHS) { // -INTMIN = INTMIN
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HiOverflow = 1; // [INTMIN+1, overflow)
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HiBound = nullptr; // e.g. X/INTMIN = 0 --> X > INTMIN
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}
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} else if (CmpRHSV.isStrictlyPositive()) { // (X / neg) op pos
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// e.g. X/-5 op 3 --> [-19, -14)
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HiBound = AddOne(Prod);
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HiOverflow = LoOverflow = ProdOV ? -1 : 0;
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if (!LoOverflow)
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LoOverflow = AddWithOverflow(LoBound, HiBound, RangeSize, true) ? -1:0;
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} else { // (X / neg) op neg
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LoBound = Prod; // e.g. X/-5 op -3 --> [15, 20)
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LoOverflow = HiOverflow = ProdOV;
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if (!HiOverflow)
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HiOverflow = SubWithOverflow(HiBound, Prod, RangeSize, true);
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}
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// Dividing by a negative swaps the condition. LT <-> GT
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Pred = ICmpInst::getSwappedPredicate(Pred);
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}
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Value *X = DivI->getOperand(0);
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switch (Pred) {
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default: llvm_unreachable("Unhandled icmp opcode!");
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case ICmpInst::ICMP_EQ:
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if (LoOverflow && HiOverflow)
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return ReplaceInstUsesWith(ICI, Builder->getFalse());
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if (HiOverflow)
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return new ICmpInst(DivIsSigned ? ICmpInst::ICMP_SGE :
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ICmpInst::ICMP_UGE, X, LoBound);
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if (LoOverflow)
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return new ICmpInst(DivIsSigned ? ICmpInst::ICMP_SLT :
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ICmpInst::ICMP_ULT, X, HiBound);
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return ReplaceInstUsesWith(ICI, InsertRangeTest(X, LoBound, HiBound,
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DivIsSigned, true));
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case ICmpInst::ICMP_NE:
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if (LoOverflow && HiOverflow)
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return ReplaceInstUsesWith(ICI, Builder->getTrue());
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if (HiOverflow)
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return new ICmpInst(DivIsSigned ? ICmpInst::ICMP_SLT :
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ICmpInst::ICMP_ULT, X, LoBound);
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if (LoOverflow)
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return new ICmpInst(DivIsSigned ? ICmpInst::ICMP_SGE :
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ICmpInst::ICMP_UGE, X, HiBound);
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return ReplaceInstUsesWith(ICI, InsertRangeTest(X, LoBound, HiBound,
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DivIsSigned, false));
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case ICmpInst::ICMP_ULT:
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case ICmpInst::ICMP_SLT:
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if (LoOverflow == +1) // Low bound is greater than input range.
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return ReplaceInstUsesWith(ICI, Builder->getTrue());
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if (LoOverflow == -1) // Low bound is less than input range.
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return ReplaceInstUsesWith(ICI, Builder->getFalse());
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return new ICmpInst(Pred, X, LoBound);
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case ICmpInst::ICMP_UGT:
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case ICmpInst::ICMP_SGT:
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if (HiOverflow == +1) // High bound greater than input range.
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return ReplaceInstUsesWith(ICI, Builder->getFalse());
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if (HiOverflow == -1) // High bound less than input range.
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return ReplaceInstUsesWith(ICI, Builder->getTrue());
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if (Pred == ICmpInst::ICMP_UGT)
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return new ICmpInst(ICmpInst::ICMP_UGE, X, HiBound);
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return new ICmpInst(ICmpInst::ICMP_SGE, X, HiBound);
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}
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}
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/// FoldICmpShrCst - Handle "icmp(([al]shr X, cst1), cst2)".
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Instruction *InstCombiner::FoldICmpShrCst(ICmpInst &ICI, BinaryOperator *Shr,
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ConstantInt *ShAmt) {
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const APInt &CmpRHSV = cast<ConstantInt>(ICI.getOperand(1))->getValue();
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// Check that the shift amount is in range. If not, don't perform
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// undefined shifts. When the shift is visited it will be
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// simplified.
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uint32_t TypeBits = CmpRHSV.getBitWidth();
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uint32_t ShAmtVal = (uint32_t)ShAmt->getLimitedValue(TypeBits);
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if (ShAmtVal >= TypeBits || ShAmtVal == 0)
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return nullptr;
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if (!ICI.isEquality()) {
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// If we have an unsigned comparison and an ashr, we can't simplify this.
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// Similarly for signed comparisons with lshr.
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if (ICI.isSigned() != (Shr->getOpcode() == Instruction::AShr))
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return nullptr;
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// Otherwise, all lshr and most exact ashr's are equivalent to a udiv/sdiv
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// by a power of 2. Since we already have logic to simplify these,
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// transform to div and then simplify the resultant comparison.
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if (Shr->getOpcode() == Instruction::AShr &&
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(!Shr->isExact() || ShAmtVal == TypeBits - 1))
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return nullptr;
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// Revisit the shift (to delete it).
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Worklist.Add(Shr);
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Constant *DivCst =
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ConstantInt::get(Shr->getType(), APInt::getOneBitSet(TypeBits, ShAmtVal));
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Value *Tmp =
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Shr->getOpcode() == Instruction::AShr ?
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Builder->CreateSDiv(Shr->getOperand(0), DivCst, "", Shr->isExact()) :
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Builder->CreateUDiv(Shr->getOperand(0), DivCst, "", Shr->isExact());
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ICI.setOperand(0, Tmp);
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// If the builder folded the binop, just return it.
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BinaryOperator *TheDiv = dyn_cast<BinaryOperator>(Tmp);
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if (!TheDiv)
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return &ICI;
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// Otherwise, fold this div/compare.
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assert(TheDiv->getOpcode() == Instruction::SDiv ||
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TheDiv->getOpcode() == Instruction::UDiv);
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Instruction *Res = FoldICmpDivCst(ICI, TheDiv, cast<ConstantInt>(DivCst));
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assert(Res && "This div/cst should have folded!");
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return Res;
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}
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// If we are comparing against bits always shifted out, the
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// comparison cannot succeed.
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APInt Comp = CmpRHSV << ShAmtVal;
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ConstantInt *ShiftedCmpRHS = Builder->getInt(Comp);
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if (Shr->getOpcode() == Instruction::LShr)
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Comp = Comp.lshr(ShAmtVal);
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else
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Comp = Comp.ashr(ShAmtVal);
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if (Comp != CmpRHSV) { // Comparing against a bit that we know is zero.
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bool IsICMP_NE = ICI.getPredicate() == ICmpInst::ICMP_NE;
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Constant *Cst = Builder->getInt1(IsICMP_NE);
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return ReplaceInstUsesWith(ICI, Cst);
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}
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// Otherwise, check to see if the bits shifted out are known to be zero.
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// If so, we can compare against the unshifted value:
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// (X & 4) >> 1 == 2 --> (X & 4) == 4.
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if (Shr->hasOneUse() && Shr->isExact())
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return new ICmpInst(ICI.getPredicate(), Shr->getOperand(0), ShiftedCmpRHS);
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if (Shr->hasOneUse()) {
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// Otherwise strength reduce the shift into an and.
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APInt Val(APInt::getHighBitsSet(TypeBits, TypeBits - ShAmtVal));
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Constant *Mask = Builder->getInt(Val);
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Value *And = Builder->CreateAnd(Shr->getOperand(0),
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Mask, Shr->getName()+".mask");
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return new ICmpInst(ICI.getPredicate(), And, ShiftedCmpRHS);
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}
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return nullptr;
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}
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#endif
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namespace {
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/// Models a check that LHS is divisible by Factor.
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class DivisibilityCheck {
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// Signedness of the check. A bitwise and is a divisibility check,
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// if its mask is (equivalent to) a power of 2 mask.
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enum { DC_Null, DC_SRem, DC_URem, DC_And } Kind;
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Value *Check;
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Value *LHS;
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ConstantInt *Factor;
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public:
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DivisibilityCheck() : Kind(DC_Null) {}
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/// Try to extract a divisibility check from V, on the assumption
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/// that it is being compared to 0.
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bool match(Value *V) {
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Kind = DC_Null;
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Check = V;
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if (::match(V, m_SRem(m_Value(LHS), m_ConstantInt(Factor))))
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Kind = DC_SRem;
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else if (::match(V, m_URem(m_Value(LHS), m_ConstantInt(Factor))))
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Kind = DC_URem;
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else if (::match(V, m_And(m_Value(LHS), m_ConstantInt(Factor))))
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Kind = DC_And;
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return Kind != DC_Null;
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}
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/// Merge another divisibility check into this one.
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bool merge(const DivisibilityCheck &O) {
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assert(Kind != DC_Null && O.Kind != DC_Null);
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if (LHS != O.LHS)
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// We don't have two divisibility checks on the same operand.
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return false;
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if (!(Check->hasOneUse() && Kind != DC_And) &&
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!(O.Check->hasOneUse() && O.Kind != DC_And))
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// We would not remove a division: bail out.
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return false;
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// Determine the factors we're checking for.
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bool Failed = false;
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APInt LHS = getFactor(O, Failed);
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APInt RHS = O.getFactor(*this, Failed);
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if (Failed)
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return false;
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// If we don't have a single signedness, we can fold the checks
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// together if one of them is for a power of 2, because
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// divisibility by a power of 2 is the same for srem and urem.
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if (Kind != O.Kind && O.Kind != DC_And && LHS.isPowerOf2())
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Kind = O.Kind;
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if (Kind != O.Kind && !RHS.isPowerOf2())
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return false;
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assert(Kind == DC_SRem || Kind == DC_URem && "bad kind after merging");
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bool Signed = Kind == DC_SRem;
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// Fold them together.
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APInt GCD = APIntOps::GreatestCommonDivisor(LHS, RHS);
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APInt LCM = LHS.udiv(GCD);
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bool Overflow = false;
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// Use a negative signed multiplication: producing INT_MIN should not
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// be considered an overflow here.
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LCM = Signed ? LCM.smul_ov(-RHS, Overflow) : LCM.umul_ov(RHS, Overflow);
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// On overflow, there cannot exist a non-zero value that is divisible by
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// both factors at once.
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if (Overflow) LCM = 0;
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Factor = cast<ConstantInt>(ConstantInt::get(Factor->getType(), LCM));
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return true;
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}
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Value *create(InstCombiner::BuilderTy *Builder) {
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// LHS is divisible by zero iff LHS is zero.
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if (!Factor->getValue())
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return LHS;
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// Checking for divisibility by power of 2 doesn't need a division.
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if (Factor->getValue().isPowerOf2())
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return Builder->CreateAnd(
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LHS, ConstantInt::get(Factor->getType(), Factor->getValue() - 1));
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return Kind == DC_SRem ? Builder->CreateSRem(LHS, Factor)
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: Builder->CreateURem(LHS, Factor);
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}
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private:
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/// Get the unsigned multiplicative factor we're checking for.
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APInt getFactor(const DivisibilityCheck &O, bool &Failed) const {
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switch (Kind) {
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case DC_Null:
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llvm_unreachable("unexpected Kind");
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case DC_SRem:
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if (Factor->getValue().isNegative())
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return -Factor->getValue();
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// Fall through.
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case DC_URem:
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return Factor->getValue();
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case DC_And:
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assert(O.Kind != DC_And && "bad kind pair");
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// If we're also checking for divisibility by K * 2^N,
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// the low N bits of the mask are irrelevant.
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APInt Result =
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Factor->getValue() |
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APInt::getLowBitsSet(Factor->getValue().getBitWidth(),
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O.getFactor(*this, Failed).countTrailingZeros());
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++Result;
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if (!!Result && !Result.isPowerOf2())
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Failed = true;
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return Result;
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}
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}
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};
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struct DivisibilityCheck_match {
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DivisibilityCheck &Check;
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DivisibilityCheck_match(DivisibilityCheck &Check) : Check(Check) {}
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bool match(Value *V) { return Check.match(V); }
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};
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/// Matcher for divisibility checks.
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DivisibilityCheck_match m_DivisibilityCheck(DivisibilityCheck &Check) {
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return DivisibilityCheck_match(Check);
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}
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}
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/// Handle "(icmp eq/ne (ashr/lshr AP2, A), AP1)" ->
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/// (icmp eq/ne A, Log2(AP2/AP1)) ->
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@ -2173,42 +1806,6 @@ Instruction *InstCombiner::foldICmpOrConstant(ICmpInst &Cmp, BinaryOperator *Or,
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if (!Cmp.isEquality() || *C != 0 || !Or->hasOneUse())
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return nullptr;
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DivisibilityCheck DivL, DivR;
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if (match(Or, m_Or(m_DivisibilityCheck(DivL), m_DivisibilityCheck(DivR))) &&
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DivL.merge(DivR)) {
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// Simplify icmp eq (or (srem P, M), (srem P, N)), 0
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// -> icmp eq (srem P, lcm(M, N)), 0
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return new ICmpInst(Pred, DivL.create(Builder),
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ConstantInt::getNullValue(Or->getType()));
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}
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#if 0
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// icmp eq (or X, Y), 0
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// -> and (icmp eq X, 0), (icmp eq Y, 0)
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// but only if this allows either subexpression to simplify further.
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Instruction *ICmpX = nullptr, *ICmpY = nullptr;
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if (auto *X = dyn_cast<Instruction>(LHSI->getOperand(0)))
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ICmpX = visitICmpInstWithInstAndIntCst(ICI, X, RHS);
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||||
if (auto *Y = dyn_cast<Instruction>(LHSI->getOperand(1)))
|
||||
ICmpY = visitICmpInstWithInstAndIntCst(ICI, Y, RHS);
|
||||
if (ICmpX || ICmpX) {
|
||||
Value *NewX, *NewY;
|
||||
if (ICmpX) {
|
||||
Worklist.Add(ICmpX);
|
||||
NewX = Builder->Insert(ICmpX);
|
||||
} else
|
||||
NewX = Builder->CreateICmp(ICI.getPredicate(), LHSI->getOperand(0),
|
||||
RHS);
|
||||
if (ICmpY) {
|
||||
Worklist.Add(ICmpY);
|
||||
NewY = Builder->Insert(ICmpY);
|
||||
} else
|
||||
NewY = Builder->CreateICmp(ICI.getPredicate(), LHSI->getOperand(1),
|
||||
RHS);
|
||||
return BinaryOperator::CreateAnd(NewX, NewY);
|
||||
}
|
||||
#endif
|
||||
|
||||
Value *P, *Q;
|
||||
if (match(Or, m_Or(m_PtrToInt(m_Value(P)), m_PtrToInt(m_Value(Q))))) {
|
||||
// Simplify icmp eq (or (ptrtoint P), (ptrtoint Q)), 0
|
||||
|
||||
@ -1,297 +0,0 @@
|
||||
; Test that multiple divisibility checks are merged.
|
||||
|
||||
; RUN: opt < %s -instcombine -S | FileCheck %s
|
||||
|
||||
define i1 @test1(i32 %A) {
|
||||
%B = srem i32 %A, 2
|
||||
%C = srem i32 %A, 3
|
||||
%D = or i32 %B, %C
|
||||
%E = icmp eq i32 %D, 0
|
||||
ret i1 %E
|
||||
; CHECK-LABEL: @test1(
|
||||
; CHECK-NEXT: srem i32 %A, 6
|
||||
; CHECK-NEXT: icmp eq i32 %{{.*}}, 0
|
||||
; CHECK-NEXT: ret i1
|
||||
}
|
||||
|
||||
define i1 @test2(i32 %A) {
|
||||
%B = urem i32 %A, 2
|
||||
%C = urem i32 %A, 3
|
||||
%D = or i32 %B, %C
|
||||
%E = icmp eq i32 %D, 0
|
||||
ret i1 %E
|
||||
; CHECK-LABEL: @test2(
|
||||
; CHECK-NEXT: urem i32 %A, 6
|
||||
; CHECK-NEXT: icmp eq i32 %{{.*}}, 0
|
||||
; CHECK-NEXT: ret i1
|
||||
}
|
||||
|
||||
define i1 @test3(i32 %A) {
|
||||
%B = srem i32 %A, 2
|
||||
%C = urem i32 %A, 3
|
||||
%D = or i32 %B, %C
|
||||
%E = icmp eq i32 %D, 0
|
||||
ret i1 %E
|
||||
; CHECK-LABEL: @test3(
|
||||
; CHECK-NEXT: urem i32 %A, 6
|
||||
; CHECK-NEXT: icmp eq i32 %{{.*}}, 0
|
||||
; CHECK-NEXT: ret i1
|
||||
}
|
||||
|
||||
define i1 @test4(i32 %A) {
|
||||
%B = urem i32 %A, 2
|
||||
%C = srem i32 %A, 3
|
||||
%D = or i32 %B, %C
|
||||
%E = icmp eq i32 %D, 0
|
||||
ret i1 %E
|
||||
; CHECK-LABEL: @test4(
|
||||
; CHECK-NEXT: srem i32 %A, 6
|
||||
; CHECK-NEXT: icmp eq i32 %{{.*}}, 0
|
||||
; CHECK-NEXT: ret i1
|
||||
}
|
||||
|
||||
define i1 @test5(i32 %A) {
|
||||
%B = srem i32 %A, 8
|
||||
%C = srem i32 %A, 12
|
||||
%D = or i32 %B, %C
|
||||
%E = icmp eq i32 %D, 0
|
||||
ret i1 %E
|
||||
; CHECK-LABEL: @test5(
|
||||
; CHECK-NEXT: srem i32 %A, 24
|
||||
; CHECK-NEXT: icmp eq i32 %{{.*}}, 0
|
||||
; CHECK-NEXT: ret i1
|
||||
}
|
||||
|
||||
define i1 @test6(i32 %A) {
|
||||
%B = and i32 %A, 6
|
||||
%C = srem i32 %A, 12
|
||||
%D = or i32 %B, %C
|
||||
%E = icmp eq i32 %D, 0
|
||||
ret i1 %E
|
||||
; CHECK-LABEL: @test6(
|
||||
; CHECK-NEXT: srem i32 %A, 24
|
||||
; CHECK-NEXT: icmp eq i32 %{{.*}}, 0
|
||||
; CHECK-NEXT: ret i1
|
||||
}
|
||||
|
||||
define i1 @test7(i32 %A) {
|
||||
%B = and i32 %A, 8
|
||||
%C = srem i32 %A, 12
|
||||
%D = or i32 %B, %C
|
||||
%E = icmp eq i32 %D, 0
|
||||
ret i1 %E
|
||||
; CHECK-LABEL: @test7(
|
||||
; CHECK-NEXT: and i32 %A, 8
|
||||
; CHECK-NEXT: srem i32 %A, 12
|
||||
; CHECK-NEXT: or
|
||||
; CHECK-NEXT: icmp
|
||||
; CHECK-NEXT: ret i1
|
||||
}
|
||||
|
||||
define i1 @test8(i32 %A, i32 %B) {
|
||||
%C = srem i32 %A, 2
|
||||
%D = srem i32 %B, 3
|
||||
%E = or i32 %C, %D
|
||||
%F = icmp eq i32 %E, 0
|
||||
ret i1 %F
|
||||
; CHECK-LABEL: @test8(
|
||||
; CHECK-NEXT: srem i32 %B, 3
|
||||
; CHECK-NEXT: and i32 %A, 1
|
||||
; CHECK-NEXT: or
|
||||
; CHECK-NEXT: icmp
|
||||
; CHECK-NEXT: ret i1
|
||||
}
|
||||
|
||||
define i1 @test9(i32 %A) {
|
||||
%B = srem i32 %A, 7589
|
||||
%C = srem i32 %A, 395309
|
||||
%D = or i32 %B, %C
|
||||
%E = icmp eq i32 %D, 0
|
||||
ret i1 %E
|
||||
; CHECK-LABEL: @test9(
|
||||
; CHECK-NEXT: icmp eq i32 %A, 0
|
||||
; CHECK-NEXT: ret i1 %E
|
||||
}
|
||||
|
||||
define i1 @test10(i32 %A) {
|
||||
; 7589 and 395309 are prime, and
|
||||
; 7589 * 395309 == 3000000001 == -1294967295 (2^32)
|
||||
%B = urem i32 %A, 7589
|
||||
%C = urem i32 %A, 395309
|
||||
%D = or i32 %B, %C
|
||||
%E = icmp eq i32 %D, 0
|
||||
ret i1 %E
|
||||
; CHECK-LABEL: @test10(
|
||||
; CHECK-NEXT: urem i32 %A, -1294967295
|
||||
; CHECK-NEXT: icmp eq i32 %{{.*}}, 0
|
||||
; CHECK-NEXT: ret i1
|
||||
}
|
||||
|
||||
define i1 @test11(i32 %A) {
|
||||
%B = urem i32 %A, 65535
|
||||
%C = urem i32 %A, 65537
|
||||
%D = or i32 %B, %C
|
||||
%E = icmp eq i32 %D, 0
|
||||
ret i1 %E
|
||||
; CHECK-LABEL: @test11(
|
||||
; CHECK-NEXT: urem i32 %A, -1
|
||||
; CHECK-NEXT: icmp eq i32 %{{.*}}, 0
|
||||
; CHECK-NEXT: ret i1
|
||||
}
|
||||
|
||||
define i1 @test12(i32 %A) {
|
||||
%B = urem i32 %A, 65536
|
||||
%C = urem i32 %A, 65537
|
||||
%D = or i32 %B, %C
|
||||
%E = icmp eq i32 %D, 0
|
||||
ret i1 %E
|
||||
; CHECK-LABEL: @test12(
|
||||
; CHECK-NEXT: icmp eq i32 %A, 0
|
||||
; CHECK-NEXT: ret i1
|
||||
}
|
||||
|
||||
define i1 @test13(i32 %A) {
|
||||
%B = srem i32 %A, 65536
|
||||
%C = urem i32 %A, 65535
|
||||
%D = or i32 %B, %C
|
||||
%E = icmp eq i32 %D, 0
|
||||
ret i1 %E
|
||||
; CHECK-LABEL: @test13(
|
||||
; CHECK-NEXT: urem i32 %A, -65536
|
||||
; CHECK-NEXT: icmp eq i32 %{{.*}}, 0
|
||||
; CHECK-NEXT: ret i1
|
||||
}
|
||||
|
||||
define i1 @test14(i32 %A) {
|
||||
%B = srem i32 %A, 95
|
||||
%C = srem i32 %A, 22605091
|
||||
%D = or i32 %B, %C
|
||||
%E = icmp eq i32 %D, 0
|
||||
ret i1 %E
|
||||
; CHECK-LABEL: @test14(
|
||||
; CHECK-NEXT: srem i32 %A, 2147483645
|
||||
; CHECK-NEXT: icmp eq i32 %{{.*}}, 0
|
||||
; CHECK-NEXT: ret i1
|
||||
}
|
||||
|
||||
define i1 @test15(i32 %A) {
|
||||
%B = srem i32 %A, 97
|
||||
%C = srem i32 %A, 22605091
|
||||
%D = or i32 %B, %C
|
||||
%E = icmp eq i32 %D, 0
|
||||
ret i1 %E
|
||||
; CHECK-LABEL: @test15(
|
||||
; CHECK-NEXT: icmp eq i32 %A, 0
|
||||
; CHECK-NEXT: ret i1
|
||||
}
|
||||
|
||||
define i32 @test16(i32 %A) {
|
||||
%B = srem i32 %A, 3
|
||||
%C = srem i32 %A, 5
|
||||
%D = or i32 %B, %C
|
||||
%E = icmp eq i32 %D, 0
|
||||
%F = zext i1 %E to i32
|
||||
%G = add i32 %B, %F
|
||||
ret i32 %G
|
||||
; CHECK-LABEL: @test16(
|
||||
; CHECK-NEXT: %B = srem i32 %A, 3
|
||||
; CHECK-NEXT: %[[REM:.*]] = srem i32 %A, 15
|
||||
; CHECK-NEXT: %E = icmp eq i32 %[[REM]], 0
|
||||
; CHECK-NEXT: %F = zext i1 %E to i32
|
||||
; CHECK-NEXT: %G = add i32 %B, %F
|
||||
; CHECK-NEXT: ret i32 %G
|
||||
}
|
||||
|
||||
define i32 @test17(i32 %A) {
|
||||
%B = srem i32 %A, 3
|
||||
%C = srem i32 %A, 5
|
||||
%D = or i32 %B, %C
|
||||
%E = icmp eq i32 %D, 0
|
||||
%F = zext i1 %E to i32
|
||||
%G = add i32 %B, %F
|
||||
%H = add i32 %C, %G
|
||||
ret i32 %H
|
||||
; CHECK-LABEL: @test17(
|
||||
; CHECK-NEXT: %B = srem i32 %A, 3
|
||||
; CHECK-NEXT: %C = srem i32 %A, 5
|
||||
; CHECK-NOT: srem
|
||||
; CHECK: ret i32
|
||||
}
|
||||
|
||||
define i32 @test18(i32 %A) {
|
||||
%B = srem i32 %A, 3
|
||||
%C = and i32 %A, 7
|
||||
%D = or i32 %B, %C
|
||||
%E = icmp eq i32 %D, 0
|
||||
%F = zext i1 %E to i32
|
||||
%G = add i32 %C, %F
|
||||
ret i32 %G
|
||||
; CHECK-LABEL: @test18(
|
||||
; CHECK-NEXT: %C = and i32 %A, 7
|
||||
; CHECK-NEXT: %[[REM:.*]] = srem i32 %A, 24
|
||||
; CHECK-NEXT: %E = icmp eq i32 %[[REM]], 0
|
||||
; CHECK-NEXT: %F = zext i1 %E to i32
|
||||
; CHECK-NEXT: %G = add
|
||||
; CHECK-NEXT: ret i32 %G
|
||||
}
|
||||
|
||||
define i1 @test19(i32 %A) {
|
||||
%B = srem i32 %A, 6
|
||||
%C = srem i32 %A, 10
|
||||
%D = icmp eq i32 %B, 0
|
||||
%E = icmp eq i32 %C, 0
|
||||
%F = and i1 %D, %E
|
||||
ret i1 %F
|
||||
; CHECK-LABEL: @test19(
|
||||
; CHECK-NEXT: %[[REM:.*]] = srem i32 %A, 30
|
||||
; CHECK-NEXT: icmp eq i32 %[[REM]], 0
|
||||
; CHECK-NEXT: ret i1
|
||||
}
|
||||
|
||||
define i1 @test20(i32 %A) {
|
||||
%B = and i32 %A, 1
|
||||
%C = srem i32 %A, 3
|
||||
%D = and i32 %A, 3
|
||||
%E = srem i32 %A, 5
|
||||
%F = srem i32 %A, 6
|
||||
%G = icmp eq i32 %B, 0
|
||||
%H = icmp eq i32 %C, 0
|
||||
%I = icmp eq i32 %D, 0
|
||||
%J = icmp eq i32 %E, 0
|
||||
%K = icmp eq i32 %F, 0
|
||||
%L = and i1 %G, %H
|
||||
%M = and i1 %L, %I
|
||||
%N = and i1 %M, %J
|
||||
%O = and i1 %N, %K
|
||||
ret i1 %O
|
||||
; CHECK-LABEL: @test20(
|
||||
; CHECK-NEXT: srem i32 %A, 60
|
||||
; CHECK-NEXT: icmp eq i32
|
||||
; CHECK-NEXT: ret i1
|
||||
}
|
||||
|
||||
define i1 @test21(i32 %A) {
|
||||
%B = srem i32 %A, -2147483648
|
||||
%C = srem i32 %A, 1024
|
||||
%D = icmp eq i32 %B, 0
|
||||
%E = icmp eq i32 %C, 0
|
||||
%F = and i1 %D, %E
|
||||
ret i1 %F
|
||||
; CHECK-LABEL: @test21(
|
||||
; CHECK-NEXT: and i32 %A, 2147483647
|
||||
; CHECK-NEXT: icmp eq i32
|
||||
; CHECK-NEXT: ret i1
|
||||
}
|
||||
|
||||
define i1 @test22(i32 %A) {
|
||||
%B = srem i32 %A, 1024
|
||||
%C = srem i32 %A, -2147483648
|
||||
%D = icmp eq i32 %B, 0
|
||||
%E = icmp eq i32 %C, 0
|
||||
%F = and i1 %D, %E
|
||||
ret i1 %F
|
||||
; CHECK-LABEL: @test22(
|
||||
; CHECK-NEXT: and i32 %A, 2147483647
|
||||
; CHECK-NEXT: icmp eq i32
|
||||
; CHECK-NEXT: ret i1
|
||||
}
|
||||
Loading…
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Reference in New Issue
Block a user