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[Hexagon] Removing old versions of cmpb and updating references.
llvm-svn: 226006
This commit is contained in:
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1e3cdfce8e
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5aaa1beaef
@ -359,11 +359,10 @@ bool HexagonInstrInfo::analyzeCompare(const MachineInstr *MI,
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Mask = ~0;
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Mask = ~0;
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break;
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break;
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case Hexagon::A4_cmpbeqi:
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case Hexagon::A4_cmpbeqi:
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case Hexagon::CMPbEQrr_sbsb_V4:
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case Hexagon::A4_cmpbeq:
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case Hexagon::CMPbEQrr_ubub_V4:
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case Hexagon::A4_cmpbgtui:
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case Hexagon::CMPbGTUri_V4:
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case Hexagon::A4_cmpbgtu:
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case Hexagon::CMPbGTUrr_V4:
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case Hexagon::A4_cmpbgt:
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case Hexagon::CMPbGTrr_V4:
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SrcReg = MI->getOperand(1).getReg();
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SrcReg = MI->getOperand(1).getReg();
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Mask = 0xFF;
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Mask = 0xFF;
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break;
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break;
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@ -386,10 +385,9 @@ bool HexagonInstrInfo::analyzeCompare(const MachineInstr *MI,
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case Hexagon::C2_cmpgtup:
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case Hexagon::C2_cmpgtup:
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case Hexagon::C2_cmpgtu:
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case Hexagon::C2_cmpgtu:
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case Hexagon::C2_cmpgt:
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case Hexagon::C2_cmpgt:
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case Hexagon::CMPbEQrr_sbsb_V4:
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case Hexagon::A4_cmpbeq:
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case Hexagon::CMPbEQrr_ubub_V4:
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case Hexagon::A4_cmpbgtu:
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case Hexagon::CMPbGTUrr_V4:
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case Hexagon::A4_cmpbgt:
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case Hexagon::CMPbGTrr_V4:
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case Hexagon::CMPhEQrr_shl_V4:
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case Hexagon::CMPhEQrr_shl_V4:
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case Hexagon::CMPhEQrr_xor_V4:
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case Hexagon::CMPhEQrr_xor_V4:
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case Hexagon::CMPhGTUrr_V4:
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case Hexagon::CMPhGTUrr_V4:
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@ -401,7 +399,7 @@ bool HexagonInstrInfo::analyzeCompare(const MachineInstr *MI,
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case Hexagon::C2_cmpgtui:
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case Hexagon::C2_cmpgtui:
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case Hexagon::C2_cmpgti:
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case Hexagon::C2_cmpgti:
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case Hexagon::A4_cmpbeqi:
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case Hexagon::A4_cmpbeqi:
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case Hexagon::CMPbGTUri_V4:
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case Hexagon::A4_cmpbgtui:
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case Hexagon::CMPhEQri_V4:
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case Hexagon::CMPhEQri_V4:
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case Hexagon::CMPhGTUri_V4:
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case Hexagon::CMPhGTUri_V4:
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SrcReg2 = 0;
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SrcReg2 = 0;
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@ -2718,46 +2718,6 @@ def : Pat <(brcond (i1 (setne (and (i32 IntRegs:$src1), 255), u8ImmPred:$src2)),
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bb:$offset)>,
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bb:$offset)>,
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Requires<[HasV4T]>;
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Requires<[HasV4T]>;
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// Pd=cmpb.eq(Rs,Rt)
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let isCompare = 1, validSubTargets = HasV4SubT in
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def CMPbEQrr_ubub_V4 : MInst<(outs PredRegs:$dst),
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(ins IntRegs:$src1, IntRegs:$src2),
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"$dst = cmpb.eq($src1, $src2)",
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[(set (i1 PredRegs:$dst),
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(seteq (and (xor (i32 IntRegs:$src1),
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(i32 IntRegs:$src2)), 255), 0))]>,
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Requires<[HasV4T]>;
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// Pd=cmpb.eq(Rs,Rt)
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let isCompare = 1, validSubTargets = HasV4SubT in
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def CMPbEQrr_sbsb_V4 : MInst<(outs PredRegs:$dst),
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(ins IntRegs:$src1, IntRegs:$src2),
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"$dst = cmpb.eq($src1, $src2)",
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[(set (i1 PredRegs:$dst),
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(seteq (shl (i32 IntRegs:$src1), (i32 24)),
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(shl (i32 IntRegs:$src2), (i32 24))))]>,
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Requires<[HasV4T]>;
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// Pd=cmpb.gt(Rs,Rt)
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let isCompare = 1, validSubTargets = HasV4SubT in
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def CMPbGTrr_V4 : MInst<(outs PredRegs:$dst),
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(ins IntRegs:$src1, IntRegs:$src2),
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"$dst = cmpb.gt($src1, $src2)",
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[(set (i1 PredRegs:$dst),
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(setgt (shl (i32 IntRegs:$src1), (i32 24)),
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(shl (i32 IntRegs:$src2), (i32 24))))]>,
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Requires<[HasV4T]>;
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// Pd=cmpb.gtu(Rs,#u7)
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let isExtendable = 1, opExtendable = 2, isExtentSigned = 0, opExtentBits = 7,
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isCompare = 1, validSubTargets = HasV4SubT, CextOpcode = "CMPbGTU", InputType = "imm" in
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def CMPbGTUri_V4 : MInst<(outs PredRegs:$dst),
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(ins IntRegs:$src1, u7Ext:$src2),
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"$dst = cmpb.gtu($src1, #$src2)",
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[(set (i1 PredRegs:$dst), (setugt (and (i32 IntRegs:$src1), 255),
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u7ExtPred:$src2))]>,
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Requires<[HasV4T]>, ImmRegRel;
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// SDNode for converting immediate C to C-1.
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// SDNode for converting immediate C to C-1.
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def DEC_CONST_BYTE : SDNodeXForm<imm, [{
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def DEC_CONST_BYTE : SDNodeXForm<imm, [{
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// Return the byte immediate const-1 as an SDNode.
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// Return the byte immediate const-1 as an SDNode.
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@ -2799,7 +2759,7 @@ def : Pat <(i32 (zext (i1 (setne (i32 (and (i32 IntRegs:$Rs), 255)),
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// if (!Pd.new) Rd=#0
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// if (!Pd.new) Rd=#0
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def : Pat <(i32 (zext (i1 (seteq (i32 IntRegs:$Rt),
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def : Pat <(i32 (zext (i1 (seteq (i32 IntRegs:$Rt),
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(i32 (and (i32 IntRegs:$Rs), 255)))))),
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(i32 (and (i32 IntRegs:$Rs), 255)))))),
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(i32 (TFR_condset_ii (i1 (CMPbEQrr_ubub_V4 (i32 IntRegs:$Rs),
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(i32 (TFR_condset_ii (i1 (A4_cmpbeq (i32 IntRegs:$Rs),
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(i32 IntRegs:$Rt))),
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(i32 IntRegs:$Rt))),
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1, 0))>,
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1, 0))>,
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Requires<[HasV4T]>;
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Requires<[HasV4T]>;
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@ -2812,7 +2772,7 @@ def : Pat <(i32 (zext (i1 (seteq (i32 IntRegs:$Rt),
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// if (!Pd.new) Rd=#1
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// if (!Pd.new) Rd=#1
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def : Pat <(i32 (zext (i1 (setne (i32 IntRegs:$Rt),
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def : Pat <(i32 (zext (i1 (setne (i32 IntRegs:$Rt),
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(i32 (and (i32 IntRegs:$Rs), 255)))))),
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(i32 (and (i32 IntRegs:$Rs), 255)))))),
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(i32 (TFR_condset_ii (i1 (CMPbEQrr_ubub_V4 (i32 IntRegs:$Rs),
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(i32 (TFR_condset_ii (i1 (A4_cmpbeq (i32 IntRegs:$Rs),
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(i32 IntRegs:$Rt))),
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(i32 IntRegs:$Rt))),
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0, 1))>,
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0, 1))>,
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Requires<[HasV4T]>;
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Requires<[HasV4T]>;
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@ -2825,7 +2785,7 @@ def : Pat <(i32 (zext (i1 (setne (i32 IntRegs:$Rt),
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// if (!Pd.new) Rd=#0
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// if (!Pd.new) Rd=#0
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def : Pat <(i32 (zext (i1 (setugt (i32 (and (i32 IntRegs:$Rs), 255)),
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def : Pat <(i32 (zext (i1 (setugt (i32 (and (i32 IntRegs:$Rs), 255)),
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u8ExtPred:$u8)))),
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u8ExtPred:$u8)))),
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(i32 (TFR_condset_ii (i1 (CMPbGTUri_V4 (i32 IntRegs:$Rs),
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(i32 (TFR_condset_ii (i1 (A4_cmpbgtui (i32 IntRegs:$Rs),
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(u8ExtPred:$u8))),
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(u8ExtPred:$u8))),
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1, 0))>,
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1, 0))>,
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Requires<[HasV4T]>;
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Requires<[HasV4T]>;
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@ -2838,7 +2798,7 @@ def : Pat <(i32 (zext (i1 (setugt (i32 (and (i32 IntRegs:$Rs), 255)),
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// if (!Pd.new) Rd=#0
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// if (!Pd.new) Rd=#0
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def : Pat <(i32 (zext (i1 (setugt (i32 (and (i32 IntRegs:$Rs), 254)),
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def : Pat <(i32 (zext (i1 (setugt (i32 (and (i32 IntRegs:$Rs), 254)),
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u8ExtPred:$u8)))),
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u8ExtPred:$u8)))),
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(i32 (TFR_condset_ii (i1 (CMPbGTUri_V4 (i32 IntRegs:$Rs),
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(i32 (TFR_condset_ii (i1 (A4_cmpbgtui (i32 IntRegs:$Rs),
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(u8ExtPred:$u8))),
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(u8ExtPred:$u8))),
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1, 0))>,
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1, 0))>,
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Requires<[HasV4T]>;
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Requires<[HasV4T]>;
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@ -2959,21 +2919,11 @@ def : Pat <(i32 (zext (i1 (setle (i32 IntRegs:$Rs), (i32 IntRegs:$Rt))))),
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let AddedComplexity = 139 in
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let AddedComplexity = 139 in
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def : Pat <(i32 (zext (i1 (setult (i32 (and (i32 IntRegs:$src1), 255)),
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def : Pat <(i32 (zext (i1 (setult (i32 (and (i32 IntRegs:$src1), 255)),
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u7StrictPosImmPred:$src2)))),
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u7StrictPosImmPred:$src2)))),
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(i32 (C2_muxii (i1 (CMPbGTUri_V4 (i32 IntRegs:$src1),
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(i32 (C2_muxii (i1 (A4_cmpbgtui (i32 IntRegs:$src1),
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(DEC_CONST_BYTE u7StrictPosImmPred:$src2))),
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(DEC_CONST_BYTE u7StrictPosImmPred:$src2))),
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0, 1))>,
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0, 1))>,
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Requires<[HasV4T]>;
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Requires<[HasV4T]>;
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// Pd=cmpb.gtu(Rs,Rt)
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let isCompare = 1, validSubTargets = HasV4SubT, CextOpcode = "CMPbGTU",
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InputType = "reg" in
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def CMPbGTUrr_V4 : MInst<(outs PredRegs:$dst),
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(ins IntRegs:$src1, IntRegs:$src2),
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"$dst = cmpb.gtu($src1, $src2)",
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[(set (i1 PredRegs:$dst), (setugt (and (i32 IntRegs:$src1), 255),
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(and (i32 IntRegs:$src2), 255)))]>,
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Requires<[HasV4T]>, ImmRegRel;
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// Following instruction is not being extended as it results into the incorrect
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// Following instruction is not being extended as it results into the incorrect
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// code for negative numbers.
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// code for negative numbers.
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