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[Hexagon] Removing old versions of cmpb and updating references.

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llvm-svn: 226006
This commit is contained in:
Colin LeMahieu 2015-01-14 18:05:44 +00:00
parent 1e3cdfce8e
commit 5aaa1beaef
2 changed files with 13 additions and 65 deletions
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18
lib/Target/Hexagon/HexagonInstrInfo.cpp
View File

@ -359,11 +359,10 @@ bool HexagonInstrInfo::analyzeCompare(const MachineInstr *MI,
Mask = ~0;
break;
case Hexagon::A4_cmpbeqi:
case Hexagon::CMPbEQrr_sbsb_V4:
case Hexagon::CMPbEQrr_ubub_V4:
case Hexagon::CMPbGTUri_V4:
case Hexagon::CMPbGTUrr_V4:
case Hexagon::CMPbGTrr_V4:
case Hexagon::A4_cmpbeq:
case Hexagon::A4_cmpbgtui:
case Hexagon::A4_cmpbgtu:
case Hexagon::A4_cmpbgt:
SrcReg = MI->getOperand(1).getReg();
Mask = 0xFF;
break;
@ -386,10 +385,9 @@ bool HexagonInstrInfo::analyzeCompare(const MachineInstr *MI,
case Hexagon::C2_cmpgtup:
case Hexagon::C2_cmpgtu:
case Hexagon::C2_cmpgt:
case Hexagon::CMPbEQrr_sbsb_V4:
case Hexagon::CMPbEQrr_ubub_V4:
case Hexagon::CMPbGTUrr_V4:
case Hexagon::CMPbGTrr_V4:
case Hexagon::A4_cmpbeq:
case Hexagon::A4_cmpbgtu:
case Hexagon::A4_cmpbgt:
case Hexagon::CMPhEQrr_shl_V4:
case Hexagon::CMPhEQrr_xor_V4:
case Hexagon::CMPhGTUrr_V4:
@ -401,7 +399,7 @@ bool HexagonInstrInfo::analyzeCompare(const MachineInstr *MI,
case Hexagon::C2_cmpgtui:
case Hexagon::C2_cmpgti:
case Hexagon::A4_cmpbeqi:
case Hexagon::CMPbGTUri_V4:
case Hexagon::A4_cmpbgtui:
case Hexagon::CMPhEQri_V4:
case Hexagon::CMPhGTUri_V4:
SrcReg2 = 0;

60
lib/Target/Hexagon/HexagonInstrInfoV4.td
View File

@ -2718,46 +2718,6 @@ def : Pat <(brcond (i1 (setne (and (i32 IntRegs:$src1), 255), u8ImmPred:$src2)),
bb:$offset)>,
Requires<[HasV4T]>;
// Pd=cmpb.eq(Rs,Rt)
let isCompare = 1, validSubTargets = HasV4SubT in
def CMPbEQrr_ubub_V4 : MInst<(outs PredRegs:$dst),
(ins IntRegs:$src1, IntRegs:$src2),
"$dst = cmpb.eq($src1, $src2)",
[(set (i1 PredRegs:$dst),
(seteq (and (xor (i32 IntRegs:$src1),
(i32 IntRegs:$src2)), 255), 0))]>,
Requires<[HasV4T]>;
// Pd=cmpb.eq(Rs,Rt)
let isCompare = 1, validSubTargets = HasV4SubT in
def CMPbEQrr_sbsb_V4 : MInst<(outs PredRegs:$dst),
(ins IntRegs:$src1, IntRegs:$src2),
"$dst = cmpb.eq($src1, $src2)",
[(set (i1 PredRegs:$dst),
(seteq (shl (i32 IntRegs:$src1), (i32 24)),
(shl (i32 IntRegs:$src2), (i32 24))))]>,
Requires<[HasV4T]>;
// Pd=cmpb.gt(Rs,Rt)
let isCompare = 1, validSubTargets = HasV4SubT in
def CMPbGTrr_V4 : MInst<(outs PredRegs:$dst),
(ins IntRegs:$src1, IntRegs:$src2),
"$dst = cmpb.gt($src1, $src2)",
[(set (i1 PredRegs:$dst),
(setgt (shl (i32 IntRegs:$src1), (i32 24)),
(shl (i32 IntRegs:$src2), (i32 24))))]>,
Requires<[HasV4T]>;
// Pd=cmpb.gtu(Rs,#u7)
let isExtendable = 1, opExtendable = 2, isExtentSigned = 0, opExtentBits = 7,
isCompare = 1, validSubTargets = HasV4SubT, CextOpcode = "CMPbGTU", InputType = "imm" in
def CMPbGTUri_V4 : MInst<(outs PredRegs:$dst),
(ins IntRegs:$src1, u7Ext:$src2),
"$dst = cmpb.gtu($src1, #$src2)",
[(set (i1 PredRegs:$dst), (setugt (and (i32 IntRegs:$src1), 255),
u7ExtPred:$src2))]>,
Requires<[HasV4T]>, ImmRegRel;
// SDNode for converting immediate C to C-1.
def DEC_CONST_BYTE : SDNodeXForm<imm, [{
// Return the byte immediate const-1 as an SDNode.
@ -2799,7 +2759,7 @@ def : Pat <(i32 (zext (i1 (setne (i32 (and (i32 IntRegs:$Rs), 255)),
// if (!Pd.new) Rd=#0
def : Pat <(i32 (zext (i1 (seteq (i32 IntRegs:$Rt),
(i32 (and (i32 IntRegs:$Rs), 255)))))),
(i32 (TFR_condset_ii (i1 (CMPbEQrr_ubub_V4 (i32 IntRegs:$Rs),
(i32 (TFR_condset_ii (i1 (A4_cmpbeq (i32 IntRegs:$Rs),
(i32 IntRegs:$Rt))),
1, 0))>,
Requires<[HasV4T]>;
@ -2812,7 +2772,7 @@ def : Pat <(i32 (zext (i1 (seteq (i32 IntRegs:$Rt),
// if (!Pd.new) Rd=#1
def : Pat <(i32 (zext (i1 (setne (i32 IntRegs:$Rt),
(i32 (and (i32 IntRegs:$Rs), 255)))))),
(i32 (TFR_condset_ii (i1 (CMPbEQrr_ubub_V4 (i32 IntRegs:$Rs),
(i32 (TFR_condset_ii (i1 (A4_cmpbeq (i32 IntRegs:$Rs),
(i32 IntRegs:$Rt))),
0, 1))>,
Requires<[HasV4T]>;
@ -2825,7 +2785,7 @@ def : Pat <(i32 (zext (i1 (setne (i32 IntRegs:$Rt),
// if (!Pd.new) Rd=#0
def : Pat <(i32 (zext (i1 (setugt (i32 (and (i32 IntRegs:$Rs), 255)),
u8ExtPred:$u8)))),
(i32 (TFR_condset_ii (i1 (CMPbGTUri_V4 (i32 IntRegs:$Rs),
(i32 (TFR_condset_ii (i1 (A4_cmpbgtui (i32 IntRegs:$Rs),
(u8ExtPred:$u8))),
1, 0))>,
Requires<[HasV4T]>;
@ -2838,7 +2798,7 @@ def : Pat <(i32 (zext (i1 (setugt (i32 (and (i32 IntRegs:$Rs), 255)),
// if (!Pd.new) Rd=#0
def : Pat <(i32 (zext (i1 (setugt (i32 (and (i32 IntRegs:$Rs), 254)),
u8ExtPred:$u8)))),
(i32 (TFR_condset_ii (i1 (CMPbGTUri_V4 (i32 IntRegs:$Rs),
(i32 (TFR_condset_ii (i1 (A4_cmpbgtui (i32 IntRegs:$Rs),
(u8ExtPred:$u8))),
1, 0))>,
Requires<[HasV4T]>;
@ -2959,21 +2919,11 @@ def : Pat <(i32 (zext (i1 (setle (i32 IntRegs:$Rs), (i32 IntRegs:$Rt))))),
let AddedComplexity = 139 in
def : Pat <(i32 (zext (i1 (setult (i32 (and (i32 IntRegs:$src1), 255)),
u7StrictPosImmPred:$src2)))),
(i32 (C2_muxii (i1 (CMPbGTUri_V4 (i32 IntRegs:$src1),
(i32 (C2_muxii (i1 (A4_cmpbgtui (i32 IntRegs:$src1),
(DEC_CONST_BYTE u7StrictPosImmPred:$src2))),
0, 1))>,
Requires<[HasV4T]>;
// Pd=cmpb.gtu(Rs,Rt)
let isCompare = 1, validSubTargets = HasV4SubT, CextOpcode = "CMPbGTU",
InputType = "reg" in
def CMPbGTUrr_V4 : MInst<(outs PredRegs:$dst),
(ins IntRegs:$src1, IntRegs:$src2),
"$dst = cmpb.gtu($src1, $src2)",
[(set (i1 PredRegs:$dst), (setugt (and (i32 IntRegs:$src1), 255),
(and (i32 IntRegs:$src2), 255)))]>,
Requires<[HasV4T]>, ImmRegRel;
// Following instruction is not being extended as it results into the incorrect
// code for negative numbers.