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Fold preceding / trailing base inc / dec into the single load / store as well.
llvm-svn: 72756
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parent
085beccfb5
commit
5afbef29fa
@ -697,7 +697,7 @@ bool ARMLoadStoreOpt::LoadStoreMultipleOpti(MachineBasicBlock &MBB) {
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// LDM/STM ops.
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for (unsigned i = 0, e = MBBII.size(); i < e; ++i)
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if (mergeBaseUpdateLSMultiple(MBB, MBBII[i], Advance, MBBI))
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NumMerges++;
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++NumMerges;
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NumMerges += MBBII.size();
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// Try folding preceeding/trailing base inc/dec into those load/store
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@ -705,10 +705,17 @@ bool ARMLoadStoreOpt::LoadStoreMultipleOpti(MachineBasicBlock &MBB) {
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for (unsigned i = 0; i != NumMemOps; ++i)
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if (!MemOps[i].Merged)
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if (mergeBaseUpdateLoadStore(MBB, MemOps[i].MBBI, TII,Advance,MBBI))
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NumMerges++;
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++NumMerges;
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// RS may be pointing to an instruction that's deleted.
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RS->skipTo(prior(MBBI));
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} else if (NumMemOps == 1) {
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// Try folding preceeding/trailing base inc/dec into the single
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// load/store.
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if (mergeBaseUpdateLoadStore(MBB, MemOps[0].MBBI, TII, Advance, MBBI)) {
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++NumMerges;
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RS->skipTo(prior(MBBI));
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}
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}
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CurrBase = 0;
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12
test/CodeGen/ARM/str_pre-2.ll
Normal file
12
test/CodeGen/ARM/str_pre-2.ll
Normal file
@ -0,0 +1,12 @@
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; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnu | grep {str.*\\!}
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; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnu | grep {ldr.*\\\[.*\], #+4}
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@b = external global i64*
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define i64 @t(i64 %a) nounwind readonly {
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entry:
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%0 = load i64** @b, align 4
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%1 = load i64* %0, align 4
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%2 = mul i64 %1, %a
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ret i64 %2
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}
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