diff --git a/lib/Target/AMDGPU/SIInstrInfo.td b/lib/Target/AMDGPU/SIInstrInfo.td index bde7c71efa6..3b00bd3533f 100644 --- a/lib/Target/AMDGPU/SIInstrInfo.td +++ b/lib/Target/AMDGPU/SIInstrInfo.td @@ -2100,6 +2100,7 @@ class VOPProfile _ArgVT, bit _EnableF32SrcMods = 0, field bit HasDst = !ne(DstVT.Value, untyped.Value); field bit HasDst32 = HasDst; field bit EmitDst = HasDst; // force dst encoding, see v_movreld_b32 special case + field bit EmitDstSel = EmitDst; field int NumSrcArgs = getNumSrcArgs.ret; field bit HasSrc0 = !ne(Src0VT.Value, untyped.Value); field bit HasSrc1 = !ne(Src1VT.Value, untyped.Value); diff --git a/lib/Target/AMDGPU/VOPCInstructions.td b/lib/Target/AMDGPU/VOPCInstructions.td index b8f27c7710d..c0a8d768066 100644 --- a/lib/Target/AMDGPU/VOPCInstructions.td +++ b/lib/Target/AMDGPU/VOPCInstructions.td @@ -27,10 +27,6 @@ class VOPC_SDWAe op, VOPProfile P> : VOP_SDWAe

{ let Inst{16-9} = !if(P.HasSrc1, src1{7-0}, 0); let Inst{24-17} = op; let Inst{31-25} = 0x3e; // encoding - - // VOPC disallows dst_sel and dst_unused as they have no effect on destination - let Inst{42-40} = 0; - let Inst{44-43} = 0; } class VOPC_SDWA9e op, VOPProfile P> : VOP_SDWA9Be

{ @@ -56,6 +52,8 @@ class VOPC_Profile sched, ValueType vt0, ValueType vt1 = vt let Asm32 = "$src0, $src1"; // The destination for 32-bit encoding is implicit. let HasDst32 = 0; + // VOPC disallows dst_sel and dst_unused as they have no effect on destination + let EmitDstSel = 0; let Outs64 = (outs VOPDstS64orS32:$sdst); list Schedule = sched; } diff --git a/lib/Target/AMDGPU/VOPInstructions.td b/lib/Target/AMDGPU/VOPInstructions.td index 54775684c32..554d2462fa1 100644 --- a/lib/Target/AMDGPU/VOPInstructions.td +++ b/lib/Target/AMDGPU/VOPInstructions.td @@ -417,8 +417,8 @@ class VOP_SDWAe : Enc64 { bits<1> clamp; let Inst{39-32} = !if(P.HasSrc0, src0{7-0}, 0); - let Inst{42-40} = !if(P.EmitDst, dst_sel{2-0}, 0); - let Inst{44-43} = !if(P.EmitDst, dst_unused{1-0}, 0); + let Inst{42-40} = !if(P.EmitDstSel, dst_sel{2-0}, 0); + let Inst{44-43} = !if(P.EmitDstSel, dst_unused{1-0}, 0); let Inst{45} = !if(P.HasSDWAClamp, clamp{0}, 0); let Inst{50-48} = !if(P.HasSrc0, src0_sel{2-0}, 0); let Inst{51} = !if(P.HasSrc0IntMods, src0_modifiers{0}, 0); @@ -468,8 +468,8 @@ class VOP_SDWA9Ae : VOP_SDWA9e

{ bits<1> clamp; bits<2> omod; - let Inst{42-40} = !if(P.EmitDst, dst_sel{2-0}, 0); - let Inst{44-43} = !if(P.EmitDst, dst_unused{1-0}, 0); + let Inst{42-40} = !if(P.EmitDstSel, dst_sel{2-0}, 0); + let Inst{44-43} = !if(P.EmitDstSel, dst_unused{1-0}, 0); let Inst{45} = !if(P.HasSDWAClamp, clamp{0}, 0); let Inst{47-46} = !if(P.HasSDWAOMod, omod{1-0}, 0); }