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[ARM] Regenerate rotation tests
llvm-svn: 367214
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@ -1,10 +1,12 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=arm-eabi -mattr=+v6 %s -o - | FileCheck %s
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; rotr (rotr x, 4), 6 -> rotr x, 10 -> ror r0, r0, #10
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define i32 @test1(i32 %x) nounwind readnone {
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; CHECK-LABEL: test1:
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; CHECK: ror r0, r0, #10
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; CHECK: bx lr
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: ror r0, r0, #10
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; CHECK-NEXT: bx lr
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entry:
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%high_part.i = shl i32 %x, 28
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%low_part.i = lshr i32 %x, 4
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@ -18,9 +20,10 @@ entry:
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; the same vector test
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define <2 x i32> @test2(<2 x i32> %x) nounwind readnone {
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; CHECK-LABEL: test2:
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; CHECK: ror r0, r0, #10
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; CHECK: ror r1, r1, #10
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; CHECK: bx lr
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: ror r0, r0, #10
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; CHECK-NEXT: ror r1, r1, #10
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; CHECK-NEXT: bx lr
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entry:
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%high_part.i = shl <2 x i32> %x, <i32 28, i32 28>
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%low_part.i = lshr <2 x i32> %x, <i32 4, i32 4>
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