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[msan] Handle X86 *.psad.* and *.pmadd.* intrinsics.
llvm-svn: 211156
This commit is contained in:
Evgeniy Stepanov
parent
ee6cb87672
commit
5b86f69879
@ -2060,6 +2060,40 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
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setOriginForNaryOp(I);
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}
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// \brief Instrument sum-of-absolute-differencies intrinsic.
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void handleVectorSadIntrinsic(IntrinsicInst &I) {
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const unsigned SignificantBitsPerResultElement = 16;
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bool isX86_MMX = I.getOperand(0)->getType()->isX86_MMXTy();
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Type *ResTy = isX86_MMX ? IntegerType::get(*MS.C, 64) : I.getType();
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unsigned ZeroBitsPerResultElement =
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ResTy->getScalarSizeInBits() - SignificantBitsPerResultElement;
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IRBuilder<> IRB(&I);
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Value *S = IRB.CreateOr(getShadow(&I, 0), getShadow(&I, 1));
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S = IRB.CreateBitCast(S, ResTy);
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S = IRB.CreateSExt(IRB.CreateICmpNE(S, Constant::getNullValue(ResTy)),
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ResTy);
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S = IRB.CreateLShr(S, ZeroBitsPerResultElement);
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S = IRB.CreateBitCast(S, getShadowTy(&I));
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setShadow(&I, S);
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setOriginForNaryOp(I);
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}
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// \brief Instrument multiply-add intrinsic.
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void handleVectorPmaddIntrinsic(IntrinsicInst &I,
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unsigned EltSizeInBits = 0) {
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bool isX86_MMX = I.getOperand(0)->getType()->isX86_MMXTy();
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Type *ResTy = isX86_MMX ? getMMXVectorTy(EltSizeInBits * 2) : I.getType();
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IRBuilder<> IRB(&I);
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Value *S = IRB.CreateOr(getShadow(&I, 0), getShadow(&I, 1));
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S = IRB.CreateBitCast(S, ResTy);
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S = IRB.CreateSExt(IRB.CreateICmpNE(S, Constant::getNullValue(ResTy)),
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ResTy);
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S = IRB.CreateBitCast(S, getShadowTy(&I));
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setShadow(&I, S);
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setOriginForNaryOp(I);
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}
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void visitIntrinsicInst(IntrinsicInst &I) {
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switch (I.getIntrinsicID()) {
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case llvm::Intrinsic::bswap:
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@ -2196,6 +2230,27 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
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handleVectorPackIntrinsic(I, 32);
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break;
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case llvm::Intrinsic::x86_mmx_psad_bw:
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case llvm::Intrinsic::x86_sse2_psad_bw:
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case llvm::Intrinsic::x86_avx2_psad_bw:
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handleVectorSadIntrinsic(I);
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break;
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case llvm::Intrinsic::x86_sse2_pmadd_wd:
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case llvm::Intrinsic::x86_avx2_pmadd_wd:
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case llvm::Intrinsic::x86_ssse3_pmadd_ub_sw_128:
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case llvm::Intrinsic::x86_avx2_pmadd_ub_sw:
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handleVectorPmaddIntrinsic(I);
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break;
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case llvm::Intrinsic::x86_ssse3_pmadd_ub_sw:
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handleVectorPmaddIntrinsic(I, 8);
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break;
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case llvm::Intrinsic::x86_mmx_pmadd_wd:
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handleVectorPmaddIntrinsic(I, 16);
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break;
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default:
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if (!handleUnknownIntrinsic(I))
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visitInstruction(I);
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65
test/Instrumentation/MemorySanitizer/vector_arith.ll
Normal file
65
test/Instrumentation/MemorySanitizer/vector_arith.ll
Normal file
@ -0,0 +1,65 @@
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; RUN: opt < %s -msan -msan-check-access-address=0 -S | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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declare <4 x i32> @llvm.x86.sse2.pmadd.wd(<8 x i16>, <8 x i16>) nounwind readnone
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declare x86_mmx @llvm.x86.ssse3.pmadd.ub.sw(x86_mmx, x86_mmx) nounwind readnone
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declare <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8>, <16 x i8>) nounwind readnone
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declare x86_mmx @llvm.x86.mmx.psad.bw(x86_mmx, x86_mmx) nounwind readnone
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define <4 x i32> @Test_sse2_pmadd_wd(<8 x i16> %a, <8 x i16> %b) sanitize_memory {
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entry:
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%c = tail call <4 x i32> @llvm.x86.sse2.pmadd.wd(<8 x i16> %a, <8 x i16> %b) nounwind
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ret <4 x i32> %c
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}
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; CHECK-LABEL: @Test_sse2_pmadd_wd(
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; CHECK: or <8 x i16>
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; CHECK: bitcast <8 x i16> {{.*}} to <4 x i32>
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; CHECK: icmp ne <4 x i32> {{.*}}, zeroinitializer
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; CHECK: sext <4 x i1> {{.*}} to <4 x i32>
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; CHECK: ret <4 x i32>
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define x86_mmx @Test_ssse3_pmadd_ub_sw(x86_mmx %a, x86_mmx %b) sanitize_memory {
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entry:
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%c = tail call x86_mmx @llvm.x86.ssse3.pmadd.ub.sw(x86_mmx %a, x86_mmx %b) nounwind
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ret x86_mmx %c
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}
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; CHECK-LABEL: @Test_ssse3_pmadd_ub_sw(
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; CHECK: or i64
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; CHECK: bitcast i64 {{.*}} to <4 x i16>
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; CHECK: icmp ne <4 x i16> {{.*}}, zeroinitializer
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; CHECK: sext <4 x i1> {{.*}} to <4 x i16>
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; CHECK: bitcast <4 x i16> {{.*}} to i64
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; CHECK: ret x86_mmx
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define <2 x i64> @Test_x86_sse2_psad_bw(<16 x i8> %a, <16 x i8> %b) sanitize_memory {
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%c = tail call <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8> %a, <16 x i8> %b)
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ret <2 x i64> %c
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}
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; CHECK-LABEL: @Test_x86_sse2_psad_bw(
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; CHECK: or <16 x i8> {{.*}}, {{.*}}
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; CHECK: bitcast <16 x i8> {{.*}} to <2 x i64>
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; CHECK: icmp ne <2 x i64> {{.*}}, zeroinitializer
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; CHECK: sext <2 x i1> {{.*}} to <2 x i64>
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; CHECK: lshr <2 x i64> {{.*}}, <i64 48, i64 48>
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; CHECK: ret <2 x i64>
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define x86_mmx @Test_x86_mmx_psad_bw(x86_mmx %a, x86_mmx %b) sanitize_memory {
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entry:
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%c = tail call x86_mmx @llvm.x86.mmx.psad.bw(x86_mmx %a, x86_mmx %b) nounwind
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ret x86_mmx %c
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}
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; CHECK-LABEL: @Test_x86_mmx_psad_bw(
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; CHECK: or i64
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; CHECK: icmp ne i64
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; CHECK: sext i1 {{.*}} to i64
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; CHECK: lshr i64 {{.*}}, 48
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; CHECK: ret x86_mmx
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