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Add XCore intrinsics for initializing / starting / synchronizing threads.
llvm-svn: 128633
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@ -69,4 +69,21 @@ let TargetPrefix = "xcore" in { // All intrinsics start with "llvm.xcore.".
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def int_xcore_checkevent : Intrinsic<[llvm_ptr_ty],[llvm_ptr_ty]>;
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def int_xcore_clre : Intrinsic<[],[],[]>;
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// Intrinsics for threads.
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def int_xcore_getst : Intrinsic <[llvm_anyptr_ty],[llvm_anyptr_ty],
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[NoCapture<0>]>;
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def int_xcore_msync : Intrinsic <[],[llvm_anyptr_ty], [NoCapture<0>]>;
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def int_xcore_ssync : Intrinsic <[],[]>;
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def int_xcore_mjoin : Intrinsic <[],[llvm_anyptr_ty], [NoCapture<0>]>;
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def int_xcore_initsp : Intrinsic <[],[llvm_anyptr_ty, llvm_ptr_ty],
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[NoCapture<0>]>;
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def int_xcore_initpc : Intrinsic <[],[llvm_anyptr_ty, llvm_ptr_ty],
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[NoCapture<0>]>;
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def int_xcore_initlr : Intrinsic <[],[llvm_anyptr_ty, llvm_ptr_ty],
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[NoCapture<0>]>;
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def int_xcore_initcp : Intrinsic <[],[llvm_anyptr_ty, llvm_ptr_ty],
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[NoCapture<0>]>;
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def int_xcore_initdp : Intrinsic <[],[llvm_anyptr_ty, llvm_ptr_ty],
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[NoCapture<0>]>;
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}
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@ -739,7 +739,7 @@ def BL_lu10 : _FLU10<
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}
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// Two operand short
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// TODO getr, getst
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// TODO eet, eef, testwct, tsetmr, sext (reg), zext (reg)
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def NOT : _F2R<(outs GRRegs:$dst), (ins GRRegs:$b),
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"not $dst, $b",
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[(set GRRegs:$dst, (not GRRegs:$b))]>;
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@ -748,8 +748,6 @@ def NEG : _F2R<(outs GRRegs:$dst), (ins GRRegs:$b),
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"neg $dst, $b",
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[(set GRRegs:$dst, (ineg GRRegs:$b))]>;
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// TODO setd, eet, eef, testwct, tinitpc, tinitdp,
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// tinitsp, tinitcp, tsetmr, sext (reg), zext (reg)
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let Constraints = "$src1 = $dst" in {
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let neverHasSideEffects = 1 in
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def SEXT_rus : _FRUS<(outs GRRegs:$dst), (ins GRRegs:$src1, i32imm:$src2),
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@ -837,9 +835,29 @@ def SETD_2r : _F2R<(outs), (ins GRRegs:$r, GRRegs:$val),
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"setd res[$r], $val",
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[(int_xcore_setd GRRegs:$r, GRRegs:$val)]>;
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def GETST_2r : _F2R<(outs GRRegs:$dst), (ins GRRegs:$r),
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"getst $dst, res[$r]",
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[(set GRRegs:$dst, (int_xcore_getst GRRegs:$r))]>;
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def INITSP_2r : _F2R<(outs), (ins GRRegs:$t, GRRegs:$src),
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"init t[$t]:sp, $src",
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[(int_xcore_initsp GRRegs:$t, GRRegs:$src)]>;
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def INITPC_2r : _F2R<(outs), (ins GRRegs:$t, GRRegs:$src),
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"init t[$t]:pc, $src",
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[(int_xcore_initpc GRRegs:$t, GRRegs:$src)]>;
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def INITCP_2r : _F2R<(outs), (ins GRRegs:$t, GRRegs:$src),
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"init t[$t]:cp, $src",
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[(int_xcore_initcp GRRegs:$t, GRRegs:$src)]>;
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def INITDP_2r : _F2R<(outs), (ins GRRegs:$t, GRRegs:$src),
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"init t[$t]:dp, $src",
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[(int_xcore_initdp GRRegs:$t, GRRegs:$src)]>;
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// Two operand long
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// TODO endin, peek,
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// getd, testlcl, tinitlr
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// getd, testlcl
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def BITREV_l2r : _FL2R<(outs GRRegs:$dst), (ins GRRegs:$src),
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"bitrev $dst, $src",
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[(set GRRegs:$dst, (int_xcore_bitrev GRRegs:$src))]>;
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@ -868,6 +886,10 @@ def SETPS_l2r : _FL2R<(outs), (ins GRRegs:$src1, GRRegs:$src2),
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"set ps[$src1], $src2",
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[(int_xcore_setps GRRegs:$src1, GRRegs:$src2)]>;
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def INITLR_l2r : _FL2R<(outs), (ins GRRegs:$t, GRRegs:$src),
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"init t[$t]:lr, $src",
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[(int_xcore_initlr GRRegs:$t, GRRegs:$src)]>;
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def SETCLK_l2r : _FL2R<(outs), (ins GRRegs:$src1, GRRegs:$src2),
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"setclk res[$src1], $src2",
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[(int_xcore_setclk GRRegs:$src1, GRRegs:$src2)]>;
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@ -881,9 +903,16 @@ def SETPSC_l2r : _FL2R<(outs), (ins GRRegs:$src1, GRRegs:$src2),
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[(int_xcore_setpsc GRRegs:$src1, GRRegs:$src2)]>;
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// One operand short
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// TODO edu, eeu, waitet, waitef, tstart, msync, mjoin, clrtp
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// TODO edu, eeu, waitet, waitef, tstart, clrtp
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// setdp, setcp, setev, kcall
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// dgetreg
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def MSYNC_1r : _F1R<(outs), (ins GRRegs:$i),
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"msync res[$i]",
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[(int_xcore_msync GRRegs:$i)]>;
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def MJOIN_1r : _F1R<(outs), (ins GRRegs:$i),
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"mjoin res[$i]",
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[(int_xcore_mjoin GRRegs:$i)]>;
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let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in
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def BAU_1r : _F1R<(outs), (ins GRRegs:$addr),
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"bau $addr",
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@ -940,7 +969,7 @@ def EEU_1r : _F1R<(outs), (ins GRRegs:$r),
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[(int_xcore_eeu GRRegs:$r)]>;
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// Zero operand short
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// TODO ssync, freet, ldspc, stspc, ldssr, stssr, ldsed, stsed,
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// TODO freet, ldspc, stspc, ldssr, stssr, ldsed, stsed,
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// stet, geted, getet, getkep, getksp, setkep, getid, kret, dcall, dret,
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// dentsp, drestsp
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@ -951,6 +980,10 @@ def GETID_0R : _F0R<(outs), (ins),
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"get r11, id",
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[(set R11, (int_xcore_getid))]>;
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def SSYNC_0r : _F0R<(outs), (ins),
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"ssync",
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[(int_xcore_ssync)]>;
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let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1,
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hasSideEffects = 1 in
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def WAITEU_0R : _F0R<(outs), (ins),
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67
test/CodeGen/XCore/threads.ll
Normal file
67
test/CodeGen/XCore/threads.ll
Normal file
@ -0,0 +1,67 @@
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; RUN: llc -march=xcore < %s | FileCheck %s
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declare i8 addrspace(1)* @llvm.xcore.getst.p1i8.p1i8(i8 addrspace(1)* %r)
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declare void @llvm.xcore.msync.p1i8(i8 addrspace(1)* %r)
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declare void @llvm.xcore.ssync()
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declare void @llvm.xcore.mjoin.p1i8(i8 addrspace(1)* %r)
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declare void @llvm.xcore.initsp.p1i8(i8 addrspace(1)* %r, i8* %value)
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declare void @llvm.xcore.initpc.p1i8(i8 addrspace(1)* %r, i8* %value)
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declare void @llvm.xcore.initlr.p1i8(i8 addrspace(1)* %r, i8* %value)
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declare void @llvm.xcore.initcp.p1i8(i8 addrspace(1)* %r, i8* %value)
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declare void @llvm.xcore.initdp.p1i8(i8 addrspace(1)* %r, i8* %value)
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define i8 addrspace(1)* @getst(i8 addrspace(1)* %r) {
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; CHECK: getst:
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; CHECK: getst r0, res[r0]
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%result = call i8 addrspace(1)* @llvm.xcore.getst.p1i8.p1i8(i8 addrspace(1)* %r)
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ret i8 addrspace(1)* %result
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}
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define void @ssync() {
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; CHECK: ssync:
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; CHECK: ssync
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call void @llvm.xcore.ssync()
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ret void
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}
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define void @mjoin(i8 addrspace(1)* %r) {
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; CHECK: mjoin:
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; CHECK: mjoin res[r0]
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call void @llvm.xcore.mjoin.p1i8(i8 addrspace(1)* %r)
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ret void
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}
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define void @initsp(i8 addrspace(1)* %t, i8* %src) {
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; CHECK: initsp:
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; CHECK: init t[r0]:sp, r1
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call void @llvm.xcore.initsp.p1i8(i8 addrspace(1)* %t, i8* %src)
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ret void
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}
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define void @initpc(i8 addrspace(1)* %t, i8* %src) {
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; CHECK: initpc:
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; CHECK: init t[r0]:pc, r1
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call void @llvm.xcore.initpc.p1i8(i8 addrspace(1)* %t, i8* %src)
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ret void
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}
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define void @initlr(i8 addrspace(1)* %t, i8* %src) {
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; CHECK: initlr:
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; CHECK: init t[r0]:lr, r1
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call void @llvm.xcore.initlr.p1i8(i8 addrspace(1)* %t, i8* %src)
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ret void
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}
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define void @initcp(i8 addrspace(1)* %t, i8* %src) {
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; CHECK: initcp:
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; CHECK: init t[r0]:cp, r1
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call void @llvm.xcore.initcp.p1i8(i8 addrspace(1)* %t, i8* %src)
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ret void
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}
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define void @initdp(i8 addrspace(1)* %t, i8* %src) {
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; CHECK: initdp:
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; CHECK: init t[r0]:dp, r1
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call void @llvm.xcore.initdp.p1i8(i8 addrspace(1)* %t, i8* %src)
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ret void
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}
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