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Fix PR1323 : we haven't updated phi nodes in good manner :)
llvm-svn: 35963
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@ -4634,6 +4634,7 @@ void SelectionDAGISel::SelectBasicBlock(BasicBlock *LLVMBB, MachineFunction &MF,
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if (PHIBB == BitTestCases[i].Default) {
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if (PHIBB == BitTestCases[i].Default) {
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PHI->addRegOperand(PHINodesToUpdate[pi].second, false);
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PHI->addRegOperand(PHINodesToUpdate[pi].second, false);
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PHI->addMachineBasicBlockOperand(BitTestCases[i].Parent);
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PHI->addMachineBasicBlockOperand(BitTestCases[i].Parent);
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PHI->addRegOperand(PHINodesToUpdate[pi].second, false);
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PHI->addMachineBasicBlockOperand(BitTestCases[i].Cases.back().ThisBB);
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PHI->addMachineBasicBlockOperand(BitTestCases[i].Cases.back().ThisBB);
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}
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}
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// One of "cases" BB.
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// One of "cases" BB.
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27
test/CodeGen/Generic/2007-04-13-SwitchLowerBadPhi.ll
Normal file
27
test/CodeGen/Generic/2007-04-13-SwitchLowerBadPhi.ll
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@ -0,0 +1,27 @@
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; RUN: llvm-as < %s | llc -fast
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; PR 1323
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; ModuleID = 'test.bc'
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
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target triple = "i686-apple-darwin8"
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%struct.comp = type { i8*, i32, i8*, [3 x i8], i32 }
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define void @regbranch() {
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cond_next240.i:
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br i1 false, label %cond_true251.i, label %cond_next272.i
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cond_true251.i: ; preds = %cond_next240.i
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switch i8 0, label %cond_next272.i [
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i8 42, label %bb268.i
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i8 43, label %bb268.i
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i8 63, label %bb268.i
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]
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bb268.i: ; preds = %cond_true251.i, %cond_true251.i, %cond_true251.i
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br label %cond_next272.i
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cond_next272.i: ; preds = %bb268.i, %cond_true251.i, %cond_next240.i
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%len.2.i = phi i32 [ 0, %bb268.i ], [ 0, %cond_next240.i ], [ 0, %cond_true251.i ] ; <i32> [#uses=1]
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%tmp278.i = icmp eq i32 %len.2.i, 1 ; <i1> [#uses=0]
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ret void
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}
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