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reenable this hack, the tblgen version isn't quite ready

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llvm-svn: 26902
This commit is contained in:
Chris Lattner 2006-03-20 17:54:43 +00:00
parent fb0e160aa5
commit 5c994b8c63
1 changed files with 16 additions and 0 deletions
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16
lib/Target/PowerPC/PPCISelDAGToDAG.cpp
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@ -927,6 +927,22 @@ void PPCDAGToDAGISel::Select(SDOperand &Result, SDOperand Op) {
switch (N->getOpcode()) {
default: break;
case ISD::VECTOR_SHUFFLE:
// FIXME: This should be autogenerated from the .td file, it is here for now
// due to bugs in tblgen.
if (Op.getOperand(1).getOpcode() == ISD::UNDEF &&
(Op.getValueType() == MVT::v4f32 || Op.getValueType() == MVT::v4i32) &&
PPC::isSplatShuffleMask(Op.getOperand(2).Val)) {
SDOperand N0;
Select(N0, N->getOperand(0));
Result = CodeGenMap[Op] =
SDOperand(CurDAG->getTargetNode(PPC::VSPLTW, MVT::v4f32,
getI32Imm(PPC::getVSPLTImmediate(Op.getOperand(2).Val)),
N0), 0);
return;
}
assert(0 && "ILLEGAL VECTOR_SHUFFLE!");
case ISD::SETCC:
Result = SelectSETCC(Op);
return;