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AMDGPU: Implement computeKnownBitsForTargetNode for mbcnt
llvm-svn: 318100
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@ -4084,6 +4084,20 @@ void AMDGPUTargetLowering::computeKnownBitsForTargetNode(
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Known.Zero.setHighBits(32 - MaxValBits);
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break;
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}
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case ISD::INTRINSIC_WO_CHAIN: {
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unsigned IID = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
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switch (IID) {
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case Intrinsic::amdgcn_mbcnt_lo:
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case Intrinsic::amdgcn_mbcnt_hi: {
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// These return at most the wavefront size - 1.
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unsigned Size = Op.getValueType().getSizeInBits();
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Known.Zero.setHighBits(Size - Subtarget->getWavefrontSizeLog2());
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break;
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}
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default:
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break;
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}
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}
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}
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}
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@ -228,6 +228,10 @@ public:
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return WavefrontSize;
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}
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unsigned getWavefrontSizeLog2() const {
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return Log2_32(WavefrontSize);
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}
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int getLocalMemorySize() const {
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return LocalMemorySize;
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}
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@ -4,8 +4,8 @@ declare i32 @llvm.amdgcn.mbcnt.lo(i32, i32) #0
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declare i32 @llvm.amdgcn.mbcnt.hi(i32, i32) #0
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; SI-LABEL: {{^}}test_array_ptr_calc:
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; SI-DAG: v_mul_lo_i32
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; SI-DAG: v_mul_hi_i32
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; SI-DAG: v_mul_u32_u24
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; SI-DAG: v_mul_hi_u32_u24
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; SI: s_endpgm
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define amdgpu_kernel void @test_array_ptr_calc(i32 addrspace(1)* noalias %out, [1025 x i32] addrspace(1)* noalias %inA, i32 addrspace(1)* noalias %inB) {
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%mbcnt.lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0)
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@ -14,6 +14,24 @@ main_body:
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ret void
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}
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; GCN-LABEL: {{^}}mbcnt_lo_known_bits:
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; GCN: v_mbcnt_lo_u32_b32
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; GCN-NOT: and
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define i32 @mbcnt_lo_known_bits(i32 %x, i32 %y) #0 {
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%lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 %x, i32 %y)
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%mask = and i32 %lo, 63
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ret i32 %mask
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}
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; GCN-LABEL: {{^}}mbcnt_hi_known_bits:
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; GCN: v_mbcnt_hi_u32_b32
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; GCN-NOT: and
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define i32 @mbcnt_hi_known_bits(i32 %x, i32 %y) #0 {
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%hi = call i32 @llvm.amdgcn.mbcnt.hi(i32 %x, i32 %y)
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%mask = and i32 %hi, 63
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ret i32 %mask
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}
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declare i32 @llvm.amdgcn.mbcnt.lo(i32, i32) #0
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declare i32 @llvm.amdgcn.mbcnt.hi(i32, i32) #0
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declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #1
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