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[DAGCombiner] Refactor to make it easy to add support for vectors in a future patch. NFCI.
llvm-svn: 301320
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@ -4203,18 +4203,18 @@ SDValue DAGCombiner::visitOR(SDNode *N) {
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// Canonicalize (or (and X, c1), c2) -> (and (or X, c2), c1|c2)
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// Canonicalize (or (and X, c1), c2) -> (and (or X, c2), c1|c2)
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// iff (c1 & c2) != 0.
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// iff (c1 & c2) != 0.
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if (N1C && N0.getOpcode() == ISD::AND && N0.getNode()->hasOneUse() &&
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if (N1C && N0.getOpcode() == ISD::AND && N0.getNode()->hasOneUse()) {
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isa<ConstantSDNode>(N0.getOperand(1))) {
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if (ConstantSDNode *C1 = dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
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ConstantSDNode *C1 = cast<ConstantSDNode>(N0.getOperand(1));
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if (C1->getAPIntValue().intersects(N1C->getAPIntValue())) {
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if (C1->getAPIntValue().intersects(N1C->getAPIntValue())) {
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if (SDValue COR = DAG.FoldConstantArithmetic(ISD::OR, SDLoc(N1), VT,
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if (SDValue COR =
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N1C, C1))
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DAG.FoldConstantArithmetic(ISD::OR, SDLoc(N1), VT, N1C, C1))
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return DAG.getNode(
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return DAG.getNode(
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ISD::AND, SDLoc(N), VT,
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ISD::AND, SDLoc(N), VT,
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DAG.getNode(ISD::OR, SDLoc(N0), VT, N0.getOperand(0), N1), COR);
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DAG.getNode(ISD::OR, SDLoc(N0), VT, N0.getOperand(0), N1), COR);
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return SDValue();
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return SDValue();
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}
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}
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}
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}
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}
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// Simplify: (or (op x...), (op y...)) -> (op (or x, y))
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// Simplify: (or (op x...), (op y...)) -> (op (or x, y))
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if (N0.getOpcode() == N1.getOpcode())
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if (N0.getOpcode() == N1.getOpcode())
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