1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 03:33:20 +01:00

[DAGCombiner] Refactor to make it easy to add support for vectors in a future patch. NFCI.

llvm-svn: 301320
This commit is contained in:
Simon Pilgrim 2017-04-25 16:16:03 +00:00
parent b0c76d3c64
commit 5ce342b483

View File

@ -4203,16 +4203,16 @@ SDValue DAGCombiner::visitOR(SDNode *N) {
// Canonicalize (or (and X, c1), c2) -> (and (or X, c2), c1|c2) // Canonicalize (or (and X, c1), c2) -> (and (or X, c2), c1|c2)
// iff (c1 & c2) != 0. // iff (c1 & c2) != 0.
if (N1C && N0.getOpcode() == ISD::AND && N0.getNode()->hasOneUse() && if (N1C && N0.getOpcode() == ISD::AND && N0.getNode()->hasOneUse()) {
isa<ConstantSDNode>(N0.getOperand(1))) { if (ConstantSDNode *C1 = dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
ConstantSDNode *C1 = cast<ConstantSDNode>(N0.getOperand(1)); if (C1->getAPIntValue().intersects(N1C->getAPIntValue())) {
if (C1->getAPIntValue().intersects(N1C->getAPIntValue())) { if (SDValue COR =
if (SDValue COR = DAG.FoldConstantArithmetic(ISD::OR, SDLoc(N1), VT, DAG.FoldConstantArithmetic(ISD::OR, SDLoc(N1), VT, N1C, C1))
N1C, C1)) return DAG.getNode(
return DAG.getNode( ISD::AND, SDLoc(N), VT,
ISD::AND, SDLoc(N), VT, DAG.getNode(ISD::OR, SDLoc(N0), VT, N0.getOperand(0), N1), COR);
DAG.getNode(ISD::OR, SDLoc(N0), VT, N0.getOperand(0), N1), COR); return SDValue();
return SDValue(); }
} }
} }