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Revert "[DebugInstrRef][2/3] Track PHI values through register coalescing"
This reverts commit ae4303b42cfa5c8c14e3fff67d73af2f154aea9a. Expensive checks buildbot has found a problem with this: https://lab.llvm.org/buildbot/#/builders/16/builds/11863
This commit is contained in:
Jeremy Morse
parent
aa63068e95
commit
5cea2689df
@ -133,20 +133,6 @@ namespace {
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AliasAnalysis *AA = nullptr;
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RegisterClassInfo RegClassInfo;
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/// Position and VReg of a PHI instruction during coalescing.
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struct PHIValPos {
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SlotIndex SI; ///< Slot where this PHI occurs.
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Register Reg; ///< VReg the PHI occurs in.
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unsigned SubReg; ///< Qualifying subregister for Reg.
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};
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/// Map from debug instruction number to PHI position during coalescing.
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DenseMap<unsigned, PHIValPos> PHIValToPos;
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/// Index of, for each VReg, which debug instruction numbers and
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/// corresponding PHIs are sensitive to coalescing. Each VReg may have
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/// multiple PHI defs, at different positions.
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DenseMap<Register, SmallVector<unsigned, 2>> RegToPHIIdx;
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/// Debug variable location tracking -- for each VReg, maintain an
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/// ordered-by-slot-index set of DBG_VALUEs, to help quick
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/// identification of whether coalescing may change location validity.
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@ -3560,64 +3546,6 @@ bool RegisterCoalescer::joinVirtRegs(CoalescerPair &CP) {
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// Scan and mark undef any DBG_VALUEs that would refer to a different value.
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checkMergingChangesDbgValues(CP, LHS, LHSVals, RHS, RHSVals);
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// If the RHS covers any PHI locations that were tracked for debug-info, we
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// must update tracking information to reflect the join.
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auto RegIt = RegToPHIIdx.find(CP.getSrcReg());
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if (RegIt != RegToPHIIdx.end()) {
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// Iterate over all the debug instruction numbers assigned this register.
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for (unsigned InstID : RegIt->second) {
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auto PHIIt = PHIValToPos.find(InstID);
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assert(PHIIt != PHIValToPos.end());
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const SlotIndex &SI = PHIIt->second.SI;
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// Does the RHS cover the position of this PHI?
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auto LII = RHS.find(SI);
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if (LII == RHS.end() || LII->start > SI)
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continue;
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// Accept two kinds of subregister movement:
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// * When we merge from one register class into a larger register:
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// %1:gr16 = some-inst
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// ->
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// %2:gr32.sub_16bit = some-inst
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// * When the PHI is already in a subregister, and the larger class
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// is coalesced:
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// %2:gr32.sub_16bit = some-inst
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// %3:gr32 = COPY %2
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// ->
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// %3:gr32.sub_16bit = some-inst
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// Test for subregister move:
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if (CP.getSrcIdx() != 0 || CP.getDstIdx() != 0)
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// If we're moving between different subregisters, ignore this join.
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// The PHI will not get a location, dropping variable locations.
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if (PHIIt->second.SubReg && PHIIt->second.SubReg != CP.getSrcIdx())
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continue;
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// Update our tracking of where the PHI is.
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PHIIt->second.Reg = CP.getDstReg();
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// If we merge into a sub-register of a larger class (test above),
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// update SubReg.
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if (CP.getSrcIdx() != 0)
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PHIIt->second.SubReg = CP.getSrcIdx();
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}
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// Rebuild the register index in RegToPHIIdx to account for PHIs tracking
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// different VRegs now. Copy old collection of debug instruction numbers and
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// erase the old one:
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auto InstrNums = RegIt->second;
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RegToPHIIdx.erase(RegIt);
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// There might already be PHIs being tracked in the destination VReg. Insert
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// into an existing tracking collection, or insert a new one.
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RegIt = RegToPHIIdx.find(CP.getDstReg());
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if (RegIt != RegToPHIIdx.end())
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RegIt->second.insert(RegIt->second.end(), InstrNums.begin(),
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InstrNums.end());
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else
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RegToPHIIdx.insert({CP.getDstReg(), InstrNums});
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}
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// Join RHS into LHS.
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LHS.join(RHS, LHSVals.getAssignments(), RHSVals.getAssignments(), NewVNInfo);
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@ -4079,19 +4007,6 @@ bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) {
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else
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JoinGlobalCopies = (EnableGlobalCopies == cl::BOU_TRUE);
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// If there are PHIs tracked by debug-info, they will need updating during
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// coalescing. Build an index of those PHIs to ease updating.
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SlotIndexes *Slots = LIS->getSlotIndexes();
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for (const auto &DebugPHI : MF->DebugPHIPositions) {
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MachineBasicBlock *MBB = DebugPHI.second.MBB;
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Register Reg = DebugPHI.second.Reg;
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unsigned SubReg = DebugPHI.second.SubReg;
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SlotIndex SI = Slots->getMBBStartIdx(MBB);
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PHIValPos P = {SI, Reg, SubReg};
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PHIValToPos.insert(std::make_pair(DebugPHI.first, P));
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RegToPHIIdx[Reg].push_back(DebugPHI.first);
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}
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// The MachineScheduler does not currently require JoinSplitEdges. This will
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// either be enabled unconditionally or replaced by a more general live range
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// splitting optimization.
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@ -4147,18 +4062,6 @@ bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) {
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}
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}
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// After coalescing, update any PHIs that are being tracked by debug-info
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// with their new VReg locations.
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for (auto &p : MF->DebugPHIPositions) {
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auto it = PHIValToPos.find(p.first);
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assert(it != PHIValToPos.end());
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p.second.Reg = it->second.Reg;
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p.second.SubReg = it->second.SubReg;
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}
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PHIValToPos.clear();
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RegToPHIIdx.clear();
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LLVM_DEBUG(dump());
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if (VerifyCoalescing)
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MF->verify(this, "After register coalescing");
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@ -1,165 +0,0 @@
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# RUN: llc %s -o - -mtriple=x86_64-unknown-unknown \
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# RUN: -experimental-debug-variable-locations \
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# RUN: -run-pass=phi-node-elimination,simple-register-coalescing \
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# RUN: | FileCheck %s --check-prefix=DOESCOALESCE
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# RUN: llc %s -o - -mtriple=x86_64-unknown-unknown \
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# RUN: -experimental-debug-variable-locations \
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# RUN: -run-pass=phi-node-elimination,simple-register-coalescing,livedebugvars,greedy,virtregrewriter \
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# RUN: | FileCheck %s --check-prefix=CHECK
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#
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# This is a sibling-test for phi-coalescing.mir, using similar code but where
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# registers are coalesced across subregisters. Specifically, vreg %2 below is
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# a 16-bit register, but will be coalesced into the lower 16 bits of a 32 bit
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# vreg during coalescing. We should survive this transformation, and emit a
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# DBG_PHI for $bx where the PHI was.
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--- |
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; ModuleID = 'promoted.ll'
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source_filename = "test.c"
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target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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; Function Attrs: noinline nounwind uwtable
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define dso_local i32 @foo(i16 signext %bar, i16 signext %baz) !dbg !7 {
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entry:
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call void @llvm.dbg.value(metadata i16 %bar, metadata !12, metadata !DIExpression()), !dbg !13
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call void @llvm.dbg.value(metadata i16 %baz, metadata !14, metadata !DIExpression()), !dbg !13
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call void @ext(i16 signext %bar), !dbg !13
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%conv = sext i16 %bar to i32, !dbg !13
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%add = add nsw i32 %conv, 12, !dbg !13
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%conv1 = trunc i32 %add to i16, !dbg !13
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call void @llvm.dbg.value(metadata i16 %conv1, metadata !12, metadata !DIExpression()), !dbg !13
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call void @ext(i16 signext %conv1), !dbg !13
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%call = call signext i16 @getlong(), !dbg !13
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%tobool = icmp ne i16 %call, 0, !dbg !13
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br i1 %tobool, label %if.then, label %if.end, !dbg !13
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if.then: ; preds = %entry
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%conv2 = sext i16 %conv1 to i32, !dbg !13
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%add3 = add nsw i32 %conv2, 1, !dbg !13
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%conv4 = trunc i32 %add3 to i16, !dbg !13
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call void @llvm.dbg.value(metadata i16 %conv4, metadata !12, metadata !DIExpression()), !dbg !13
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br label %if.end, !dbg !13
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if.end: ; preds = %if.then, %entry
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%bar.addr.0 = phi i16 [ %conv4, %if.then ], [ %conv1, %entry ], !dbg !13
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call void @llvm.dbg.value(metadata i16 %bar.addr.0, metadata !12, metadata !DIExpression()), !dbg !13
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%conv5 = sext i16 %baz to i32, !dbg !13
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%conv6 = sext i16 %bar.addr.0 to i32, !dbg !13
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%add7 = add nsw i32 %conv6, %conv5, !dbg !13
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%conv8 = trunc i32 %add7 to i16, !dbg !13
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call void @llvm.dbg.value(metadata i16 %conv8, metadata !12, metadata !DIExpression()), !dbg !13
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call void @ext(i16 signext %conv8), !dbg !13
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%conv9 = sext i16 %conv8 to i32, !dbg !13
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ret i32 %conv9, !dbg !13
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}
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; Function Attrs: nounwind readnone speculatable willreturn
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declare void @llvm.dbg.declare(metadata, metadata, metadata)
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declare dso_local void @ext(i16 signext)
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declare dso_local signext i16 @getlong()
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; Function Attrs: nounwind readnone speculatable willreturn
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declare void @llvm.dbg.value(metadata, metadata, metadata)
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!3, !4, !5}
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!llvm.ident = !{!6}
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!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 12.0.0 (git@github.com:llvm/llvm-project 79a35789efdf2378f97642ae4a5f3099b9087a11)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None)
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!1 = !DIFile(filename: "test.c", directory: "/fast/fs/llvm3/llvm/test/DebugInfo/MIR/InstrRef")
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!2 = !{}
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!3 = !{i32 7, !"Dwarf Version", i32 4}
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!4 = !{i32 2, !"Debug Info Version", i32 3}
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!5 = !{i32 1, !"wchar_size", i32 4}
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!6 = !{!"clang version 12.0.0 (git@github.com:llvm/llvm-project 79a35789efdf2378f97642ae4a5f3099b9087a11)"}
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!7 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 3, type: !8, scopeLine: 3, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !2)
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!8 = !DISubroutineType(types: !9)
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!9 = !{!10, !11, !11}
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!10 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
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!11 = !DIBasicType(name: "short", size: 16, encoding: DW_ATE_signed)
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!12 = !DILocalVariable(name: "bar", arg: 1, scope: !7, file: !1, line: 3, type: !11)
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!13 = !DILocation(line: 0, scope: !7)
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!14 = !DILocalVariable(name: "baz", arg: 2, scope: !7, file: !1, line: 3, type: !11)
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!15 = distinct !DILexicalBlock(scope: !7, file: !1, line: 8, column: 7)
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...
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---
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name: foo
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alignment: 16
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tracksRegLiveness: true
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liveins:
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- { reg: '$edi', virtual-reg: '%3' }
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- { reg: '$esi', virtual-reg: '%4' }
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frameInfo:
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maxAlignment: 1
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hasCalls: true
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machineFunctionInfo: {}
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body: |
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bb.0.entry:
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liveins: $edi, $esi
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%4:gr32 = COPY $esi
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%3:gr32 = COPY $edi
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%6:gr16 = COPY %4.sub_16bit
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%5:gr16 = COPY %3.sub_16bit
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DBG_VALUE %5, $noreg, !12, !DIExpression(), debug-location !13
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DBG_VALUE %6, $noreg, !14, !DIExpression(), debug-location !13
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ADJCALLSTACKDOWN64 0, 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !13
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%15:gr32 = MOVSX32rr16 %5, debug-location !13
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$edi = COPY %15, debug-location !13
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CALL64pcrel32 @ext, csr_64, implicit $rsp, implicit $ssp, implicit $edi, debug-location !13
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ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !13
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%14:gr32 = MOVSX32rr16 %5, debug-location !13
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%13:gr32 = ADD32ri8 killed %14, 12, implicit-def $eflags, debug-location !13
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%11:gr16 = COPY killed %13.sub_16bit, debug-location !13
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DBG_VALUE %11, $noreg, !12, !DIExpression(), debug-location !13
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ADJCALLSTACKDOWN64 0, 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !13
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%9:gr32 = MOVSX32rr16 %11, debug-location !13
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$edi = COPY %9, debug-location !13
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CALL64pcrel32 @ext, csr_64, implicit $rsp, implicit $ssp, implicit $edi, debug-location !13
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ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !13
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ADJCALLSTACKDOWN64 0, 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !13
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CALL64pcrel32 @getlong, csr_64, implicit $rsp, implicit $ssp, implicit-def $ax, debug-location !13
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ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !13
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%8:gr16 = COPY $ax, debug-location !13
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CMP16ri8 %8, 0, implicit-def $eflags, debug-location !13
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JCC_1 %bb.2, 4, implicit $eflags, debug-location !13
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; DOESCOALESCE-LABEL: bb.1.if.then:
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; CHECK-LABEL: bb.1.if.then:
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bb.1.if.then:
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%20:gr32 = MOVSX32rr16 %11, debug-location !13
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%19:gr32 = ADD32ri8 killed %20, 1, implicit-def $eflags, debug-location !13
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%17:gr16 = COPY killed %19.sub_16bit, debug-location !13
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DBG_VALUE %17, $noreg, !12, !DIExpression(), debug-location !13
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; Verify that vreg 17 is coalesced into gr32.
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; DOESCOALESCE: %{{[0-9]+}}:gr32 = ADD32ri8
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; DOESCOALESCE-NEXT: DBG_VALUE %{{[0-9]+}}.sub_16bit,
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; Verify those registers land in $bx
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; CHECK: renamable $ebp = ADD32ri8
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; CHECK-NEXT: DBG_VALUE $bp
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; DOESCOALESCE-LABEL: bb.2.if.end:
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; CHECK-LABEL: bb.2.if.end:
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bb.2.if.end:
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%2:gr16 = PHI %11, %bb.0, %17, %bb.1, debug-instr-number 1, debug-location !13
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; CHECK: DBG_PHI $bp, 1
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DBG_INSTR_REF 1, 0, !12, !DIExpression(), debug-location !13
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%31:gr32 = MOVSX32rr16 %6, debug-location !13
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%30:gr32 = MOVSX32rr16 killed %2, debug-location !13
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%29:gr32 = ADD32rr killed %30, killed %31, implicit-def $eflags, debug-location !13
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%26:gr16 = COPY killed %29.sub_16bit, debug-location !13
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DBG_VALUE %26, $noreg, !12, !DIExpression(), debug-location !13
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ADJCALLSTACKDOWN64 0, 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !13
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%24:gr32 = MOVSX32rr16 %26, debug-location !13
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$edi = COPY %24, debug-location !13
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CALL64pcrel32 @ext, csr_64, implicit $rsp, implicit $ssp, implicit $edi, debug-location !13
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ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !13
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%23:gr32 = MOVSX32rr16 %26, debug-location !13
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$eax = COPY %23, debug-location !13
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RETQ implicit $eax, debug-location !13
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...
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@ -1,165 +0,0 @@
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# RUN: llc %s -o - -mtriple=x86_64-unknown-unknown \
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# RUN: -experimental-debug-variable-locations \
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# RUN: -run-pass=phi-node-elimination,simple-register-coalescing \
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# RUN: | FileCheck %s --check-prefix=DOESCOALESCE
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# RUN: llc %s -o - -mtriple=x86_64-unknown-unknown \
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# RUN: -experimental-debug-variable-locations \
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# RUN: -run-pass=phi-node-elimination,simple-register-coalescing,livedebugvars,greedy,virtregrewriter \
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# RUN: | FileCheck %s --check-prefix=CHECK
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#
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# Test that a PHI with a debug instruction number attached survives register
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# coalescing, when its vreg gets coalesced. This test comes in two parts, first
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# that coalescing actually happens, second that a DBG_PHI is still produced
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# afterwards.
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#
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# Original C code, the PHI is of the value of 'bar' after the control flow.
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# Compiled at -O0, applied -mem2reg, llc -O0, then manually added the PHI
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# instruction label.
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#
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# void ext(long);
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# long getlong(void);
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# int foo(long bar, long baz) {
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# ext(bar);
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# bar += 12;
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# ext(bar);
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#
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# if (getlong())
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# bar += 1;
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#
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# bar += baz;
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# ext(bar);
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# return bar;
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# }
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#
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--- |
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; ModuleID = 'promoted.ll'
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source_filename = "test.c"
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target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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define dso_local i32 @foo(i64 %bar, i64 %baz) !dbg !7 {
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entry:
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call void @llvm.dbg.value(metadata i64 %bar, metadata !12, metadata !DIExpression()), !dbg !13
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call void @llvm.dbg.value(metadata i64 %baz, metadata !14, metadata !DIExpression()), !dbg !13
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call void @ext(i64 %bar), !dbg !13
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%add = add nsw i64 %bar, 12, !dbg !13
|
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call void @llvm.dbg.value(metadata i64 %add, metadata !12, metadata !DIExpression()), !dbg !13
|
||||
call void @ext(i64 %add), !dbg !13
|
||||
%call = call i64 @getlong(), !dbg !13
|
||||
%tobool = icmp ne i64 %call, 0, !dbg !13
|
||||
br i1 %tobool, label %if.then, label %if.end, !dbg !13
|
||||
|
||||
if.then: ; preds = %entry
|
||||
%add1 = add nsw i64 %add, 1, !dbg !13
|
||||
call void @llvm.dbg.value(metadata i64 %add1, metadata !12, metadata !DIExpression()), !dbg !13
|
||||
br label %if.end, !dbg !13
|
||||
|
||||
if.end: ; preds = %if.then, %entry
|
||||
%bar.addr.0 = phi i64 [ %add1, %if.then ], [ %add, %entry ], !dbg !13
|
||||
call void @llvm.dbg.value(metadata i64 %bar.addr.0, metadata !12, metadata !DIExpression()), !dbg !13
|
||||
%add2 = add nsw i64 %bar.addr.0, %baz, !dbg !13
|
||||
call void @llvm.dbg.value(metadata i64 %add2, metadata !12, metadata !DIExpression()), !dbg !13
|
||||
call void @ext(i64 %add2), !dbg !13
|
||||
%conv = trunc i64 %add2 to i32, !dbg !13
|
||||
ret i32 %conv, !dbg !13
|
||||
}
|
||||
|
||||
; Function Attrs: nounwind readnone speculatable willreturn
|
||||
declare void @llvm.dbg.declare(metadata, metadata, metadata)
|
||||
|
||||
declare dso_local void @ext(i64)
|
||||
|
||||
declare dso_local i64 @getlong()
|
||||
|
||||
; Function Attrs: nounwind readnone speculatable willreturn
|
||||
declare void @llvm.dbg.value(metadata, metadata, metadata)
|
||||
|
||||
!llvm.dbg.cu = !{!0}
|
||||
!llvm.module.flags = !{!3, !4, !5}
|
||||
!llvm.ident = !{!6}
|
||||
|
||||
!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None)
|
||||
!1 = !DIFile(filename: "test.c", directory: "/tmp/out.c")
|
||||
!2 = !{}
|
||||
!3 = !{i32 7, !"Dwarf Version", i32 4}
|
||||
!4 = !{i32 2, !"Debug Info Version", i32 3}
|
||||
!5 = !{i32 1, !"wchar_size", i32 4}
|
||||
!6 = !{!""}
|
||||
!7 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 3, type: !8, scopeLine: 3, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !2)
|
||||
!8 = !DISubroutineType(types: !9)
|
||||
!9 = !{!10, !11, !11}
|
||||
!10 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
|
||||
!11 = !DIBasicType(name: "long int", size: 64, encoding: DW_ATE_signed)
|
||||
!12 = !DILocalVariable(name: "bar", arg: 1, scope: !7, file: !1, line: 3, type: !11)
|
||||
!13 = !DILocation(line: 0, scope: !7)
|
||||
!14 = !DILocalVariable(name: "baz", arg: 2, scope: !7, file: !1, line: 3, type: !11)
|
||||
!15 = distinct !DILexicalBlock(scope: !7, file: !1, line: 8, column: 7)
|
||||
|
||||
...
|
||||
---
|
||||
name: foo
|
||||
alignment: 16
|
||||
tracksRegLiveness: true
|
||||
liveins:
|
||||
- { reg: '$rdi', virtual-reg: '%3' }
|
||||
- { reg: '$rsi', virtual-reg: '%5' }
|
||||
frameInfo:
|
||||
maxAlignment: 1
|
||||
hasCalls: true
|
||||
machineFunctionInfo: {}
|
||||
body: |
|
||||
bb.0.entry:
|
||||
liveins: $rdi, $rsi
|
||||
|
||||
%5:gr64 = COPY $rsi
|
||||
%3:gr64 = COPY $rdi
|
||||
%4:gr64 = COPY killed %3
|
||||
%6:gr64 = COPY killed %5
|
||||
DBG_VALUE %4, $noreg, !12, !DIExpression(), debug-location !13
|
||||
DBG_VALUE %6, $noreg, !14, !DIExpression(), debug-location !13
|
||||
ADJCALLSTACKDOWN64 0, 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !13
|
||||
$rdi = COPY %4, debug-location !13
|
||||
CALL64pcrel32 @ext, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, debug-location !13
|
||||
ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !13
|
||||
%9:gr64 = ADD64ri32 %4, 12, implicit-def $eflags, debug-location !13
|
||||
DBG_VALUE %9, $noreg, !12, !DIExpression(), debug-location !13
|
||||
ADJCALLSTACKDOWN64 0, 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !13
|
||||
$rdi = COPY %9, debug-location !13
|
||||
CALL64pcrel32 @ext, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, debug-location !13
|
||||
ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !13
|
||||
ADJCALLSTACKDOWN64 0, 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !13
|
||||
CALL64pcrel32 @getlong, csr_64, implicit $rsp, implicit $ssp, implicit-def $rax, debug-location !13
|
||||
ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !13
|
||||
%8:gr64 = COPY $rax, debug-location !13
|
||||
CMP64ri8 %8, 0, implicit-def $eflags, debug-location !13
|
||||
JCC_1 %bb.2, 4, implicit $eflags, debug-location !13
|
||||
|
||||
; DOESCOALESCE-LABEL: bb.1.if.then:
|
||||
; CHECK-LABEL: bb.1.if.then:
|
||||
bb.1.if.then:
|
||||
%10:gr64 = ADD64ri32 %9, 1, implicit-def $eflags, debug-location !13
|
||||
DBG_VALUE %10, $noreg, !12, !DIExpression(), debug-location !13
|
||||
|
||||
; Verify that the vreg is different immediately after register coalescing.
|
||||
; DOESCOALESCE-NOT: %10:gr64 ADD64ri32
|
||||
; DOESCOALESCE: %{{[0-9]+}}:gr64 = ADD64ri32
|
||||
; Verify that all these registers land in rbx.
|
||||
; CHECK: renamable $rbx = ADD64ri32 killed renamable $rbx
|
||||
|
||||
; DOESCOALESCE-LABEL: bb.2.if.end:
|
||||
; CHECK-LABEL: bb.2.if.end:
|
||||
bb.2.if.end:
|
||||
%2:gr64 = PHI %9, %bb.0, %10, %bb.1, debug-instr-number 1, debug-location !13
|
||||
; CHECK: DBG_PHI $rbx, 1
|
||||
DBG_INSTR_REF 1, 0, !12, !DIExpression(), debug-location !13
|
||||
%14:gr64 = ADD64rr killed %2, %6, implicit-def $eflags, debug-location !13
|
||||
DBG_VALUE %14, $noreg, !12, !DIExpression(), debug-location !13
|
||||
ADJCALLSTACKDOWN64 0, 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !13
|
||||
$rdi = COPY %14, debug-location !13
|
||||
CALL64pcrel32 @ext, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, debug-location !13
|
||||
ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !13
|
||||
%13:gr32 = COPY %14.sub_32bit, debug-location !13
|
||||
$eax = COPY %13, debug-location !13
|
||||
RETQ implicit $eax, debug-location !13
|
||||
|
||||
...
|
||||
Loading…
Reference in New Issue
Block a user