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AMDGPU: M0 operands to spill/restore opcodes are dead

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Summary:
With scalar stores, M0 is clobbered and therefore marked as implicitly
defined. However, it is also dead.

This fixes an assertion when the Greedy Register Allocator decides to
optimize a spill/restore pair away again (via tryHintsRecoloring).

Reviewers: arsenm

Subscribers: qcolombet, kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D33319

llvm-svn: 306375
This commit is contained in:
Nicolai Haehnle 2017-06-27 08:04:13 +00:00
parent e708cd8422
commit 5cfc836f21
2 changed files with 24 additions and 2 deletions
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4
lib/Target/AMDGPU/SIInstrInfo.cpp
View File

@ -770,7 +770,7 @@ void SIInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
if (ST.hasScalarStores()) {
// m0 is used for offset to scalar stores if used to spill.
Spill.addReg(AMDGPU::M0, RegState::ImplicitDefine);
Spill.addReg(AMDGPU::M0, RegState::ImplicitDefine | RegState::Dead);
}
return;
@ -871,7 +871,7 @@ void SIInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
if (ST.hasScalarStores()) {
// m0 is used for offset to scalar stores if used to spill.
Spill.addReg(AMDGPU::M0, RegState::ImplicitDefine);
Spill.addReg(AMDGPU::M0, RegState::ImplicitDefine | RegState::Dead);
}
return;

22
test/CodeGen/AMDGPU/spill-to-smem-m0.ll Normal file
View File

@ -0,0 +1,22 @@
; RUN: llc -O0 -march=amdgcn -mcpu=fiji -amdgpu-spill-sgpr-to-smem=1 -verify-machineinstrs -stop-before=prologepilog < %s
; Spill to SMEM clobbers M0. Check that the implicit-def dead operand is present
; in the pseudo instructions.
; CHECK-LABEL: {{^}}spill_sgpr:
; CHECK: SI_SPILL_S32_SAVE {{.*}}, implicit-def dead %m0
; CHECK: SI_SPILL_S32_RESTORE {{.*}}, implicit-def dead %m0
define amdgpu_kernel void @spill_sgpr(i32 addrspace(1)* %out, i32 %in) #0 {
%sgpr = call i32 asm sideeffect "; def $0", "=s" () #0
%cmp = icmp eq i32 %in, 0
br i1 %cmp, label %bb0, label %ret
bb0:
call void asm sideeffect "; use $0", "s"(i32 %sgpr) #0
br label %ret
ret:
ret void
}
attributes #0 = { nounwind }