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[MCA] [RegisterFile] Allow for skipping Defs with RegID of 0 (rather than assert(RegID) like we do before this patch).

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This patch will allow developers to remove unwanted instruction Defs (most likely from within a target specific InstrPostProcess) by setting that Def's RegisterID to 0.
Differential Revision: https://reviews.llvm.org/D104433
This commit is contained in:
Patrick Holland 2021-06-16 15:53:00 -07:00
parent 6e97d78450
commit 5d008e4862
1 changed files with 16 additions and 3 deletions
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19
lib/MCA/HardwareUnits/RegisterFile.cpp
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@ -109,7 +109,12 @@ void RegisterFile::onInstructionExecuted(Instruction *IS) {
return;
MCPhysReg RegID = WS.getRegisterID();
assert(RegID != 0 && "A write of an invalid register?");
// This allows InstrPostProcess to remove register Defs
// by setting their RegisterID to 0.
if (!RegID)
continue;
assert(WS.getCyclesLeft() != UNKNOWN_CYCLES &&
"The number of cycles should be known at this point!");
assert(WS.getCyclesLeft() <= 0 && "Invalid cycles left for this write!");
@ -224,7 +229,11 @@ void RegisterFile::addRegisterWrite(WriteRef Write,
MutableArrayRef<unsigned> UsedPhysRegs) {
WriteState &WS = *Write.getWriteState();
MCPhysReg RegID = WS.getRegisterID();
assert(RegID && "Adding an invalid register definition?");
// This allows InstrPostProcess to remove register Defs
// by setting their RegisterID to 0.
if (!RegID)
return;
LLVM_DEBUG({
dbgs() << "[PRF] addRegisterWrite [ " << Write.getSourceIndex() << ", "
@ -316,7 +325,11 @@ void RegisterFile::removeRegisterWrite(
MCPhysReg RegID = WS.getRegisterID();
assert(RegID != 0 && "Invalidating an already invalid register?");
// This allows InstrPostProcess to remove register Defs
// by setting their RegisterID to 0.
if (!RegID)
return;
assert(WS.getCyclesLeft() != UNKNOWN_CYCLES &&
"Invalidating a write of unknown cycles!");
assert(WS.getCyclesLeft() <= 0 && "Invalid cycles left for this write!");