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[IR] Add NoUndef attribute to Intrinsics.td
This patch adds NoUndef to Intrinsics.td. The attribute is attached to llvm.assume's operand, because llvm.assume(undef) is UB. It is attached to pointer operands of several memory accessing intrinsics as well. This change makes ValueTracking::getGuaranteedNonPoisonOps' intrinsic check unnecessary, so it is removed. Reviewed By: jdoerfert Differential Revision: https://reviews.llvm.org/D86576
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@ -83,6 +83,11 @@ class NoAlias<AttrIndex idx> : IntrinsicProperty {
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int ArgNo = idx.Value;
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}
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// NoUndef - The specified argument is neither undef nor poison.
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class NoUndef<AttrIndex idx> : IntrinsicProperty {
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int ArgNo = idx.Value;
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}
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class Align<AttrIndex idx, int align> : IntrinsicProperty {
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int ArgNo = idx.Value;
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int Align = align;
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@ -515,7 +520,8 @@ def int_readcyclecounter : Intrinsic<[llvm_i64_ty]>;
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// The assume intrinsic is marked as arbitrarily writing so that proper
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// control dependencies will be maintained.
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def int_assume : Intrinsic<[], [llvm_i1_ty], [IntrWillReturn]>;
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def int_assume : Intrinsic<[], [llvm_i1_ty], [IntrWillReturn,
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NoUndef<ArgIndex<0>>]>;
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// Stack Protector Intrinsic - The stackprotector intrinsic writes the stack
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// guard to the correct place on the stack frame.
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@ -1347,26 +1353,28 @@ def int_masked_store : Intrinsic<[], [llvm_anyvector_ty,
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LLVMAnyPointerType<LLVMMatchType<0>>,
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llvm_i32_ty,
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LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>],
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[IntrArgMemOnly, IntrWillReturn, ImmArg<ArgIndex<2>>]>;
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[IntrArgMemOnly, IntrWillReturn,
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NoUndef<ArgIndex<1>>, ImmArg<ArgIndex<2>>]>;
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def int_masked_load : Intrinsic<[llvm_anyvector_ty],
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[LLVMAnyPointerType<LLVMMatchType<0>>, llvm_i32_ty,
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LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>, LLVMMatchType<0>],
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[IntrReadMem, IntrArgMemOnly, IntrWillReturn,
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ImmArg<ArgIndex<1>>]>;
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NoUndef<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
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def int_masked_gather: Intrinsic<[llvm_anyvector_ty],
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[LLVMVectorOfAnyPointersToElt<0>, llvm_i32_ty,
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LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
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LLVMMatchType<0>],
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[IntrReadMem, IntrWillReturn,
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ImmArg<ArgIndex<1>>]>;
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NoUndef<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
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def int_masked_scatter: Intrinsic<[],
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[llvm_anyvector_ty,
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LLVMVectorOfAnyPointersToElt<0>, llvm_i32_ty,
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LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>],
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[IntrWillReturn, ImmArg<ArgIndex<2>>]>;
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[IntrWillReturn, NoUndef<ArgIndex<1>>,
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ImmArg<ArgIndex<2>>]>;
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def int_masked_expandload: Intrinsic<[llvm_anyvector_ty],
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[LLVMPointerToElt<0>,
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@ -5093,16 +5093,6 @@ void llvm::getGuaranteedNonPoisonOps(const Instruction *I,
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case Instruction::Call:
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case Instruction::Invoke: {
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if (auto *II = dyn_cast<IntrinsicInst>(I)) {
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switch (II->getIntrinsicID()) {
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case Intrinsic::assume:
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Operands.insert(II->getArgOperand(0));
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break;
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default:
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break;
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}
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}
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const CallBase *CB = cast<CallBase>(I);
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if (CB->isIndirectCall())
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Operands.insert(CB->getCalledOperand());
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@ -525,3 +525,5 @@ define i32 @test_invariant_load_scope(i32* %p) {
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%sub = sub i32 %v1, %v2
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ret i32 %sub
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}
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; USE_ASSUME: declare void @llvm.assume(i1 noundef)
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@ -148,6 +148,7 @@ struct CodeGenIntrinsic {
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enum ArgAttrKind {
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NoCapture,
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NoAlias,
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NoUndef,
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Returned,
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ReadOnly,
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WriteOnly,
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@ -846,6 +846,9 @@ void CodeGenIntrinsic::setProperty(Record *R) {
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} else if (R->isSubClassOf("NoAlias")) {
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unsigned ArgNo = R->getValueAsInt("ArgNo");
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ArgumentAttributes.emplace_back(ArgNo, NoAlias, 0);
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} else if (R->isSubClassOf("NoUndef")) {
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unsigned ArgNo = R->getValueAsInt("ArgNo");
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ArgumentAttributes.emplace_back(ArgNo, NoUndef, 0);
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} else if (R->isSubClassOf("Returned")) {
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unsigned ArgNo = R->getValueAsInt("ArgNo");
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ArgumentAttributes.emplace_back(ArgNo, Returned, 0);
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@ -687,6 +687,12 @@ void IntrinsicEmitter::EmitAttributes(const CodeGenIntrinsicTable &Ints,
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OS << "Attribute::NoAlias";
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addComma = true;
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break;
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case CodeGenIntrinsic::NoUndef:
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if (addComma)
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OS << ",";
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OS << "Attribute::NoUndef";
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addComma = true;
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break;
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case CodeGenIntrinsic::Returned:
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if (addComma)
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OS << ",";
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