diff --git a/lib/CodeGen/GlobalISel/LegalizerInfo.cpp b/lib/CodeGen/GlobalISel/LegalizerInfo.cpp index 30acac14bc5..dfc4034e11a 100644 --- a/lib/CodeGen/GlobalISel/LegalizerInfo.cpp +++ b/lib/CodeGen/GlobalISel/LegalizerInfo.cpp @@ -446,8 +446,8 @@ LegalizeRuleSet &LegalizerInfo::getActionDefinitionsBuilder( assert(!llvm::empty(Opcodes) && Opcodes.begin() + 1 != Opcodes.end() && "Initializer list must have at least two opcodes"); - for (auto I = Opcodes.begin() + 1, E = Opcodes.end(); I != E; ++I) - aliasActionDefinitions(Representative, *I); + for (unsigned Op : llvm::drop_begin(Opcodes)) + aliasActionDefinitions(Representative, Op); auto &Return = getActionDefinitionsBuilder(Representative); Return.setIsAliasedByAnother(); diff --git a/lib/CodeGen/GlobalISel/Localizer.cpp b/lib/CodeGen/GlobalISel/Localizer.cpp index 30c00c63f6f..d45fdae43f0 100644 --- a/lib/CodeGen/GlobalISel/Localizer.cpp +++ b/lib/CodeGen/GlobalISel/Localizer.cpp @@ -82,8 +82,7 @@ bool Localizer::localizeInterBlock(MachineFunction &MF, // we start doing CSE across blocks. auto &MBB = MF.front(); auto &TL = *MF.getSubtarget().getTargetLowering(); - for (auto RI = MBB.rbegin(), RE = MBB.rend(); RI != RE; ++RI) { - MachineInstr &MI = *RI; + for (MachineInstr &MI : llvm::reverse(MBB)) { if (!TL.shouldLocalize(MI, TTI)) continue; LLVM_DEBUG(dbgs() << "Should localize: " << MI); diff --git a/lib/CodeGen/LiveVariables.cpp b/lib/CodeGen/LiveVariables.cpp index 8201baf220f..e0ef38dbc72 100644 --- a/lib/CodeGen/LiveVariables.cpp +++ b/lib/CodeGen/LiveVariables.cpp @@ -774,13 +774,12 @@ void LiveVariables::addNewBlock(MachineBasicBlock *BB, // Record all vreg defs and kills of all instructions in SuccBB. for (; BBI != BBE; ++BBI) { - for (MachineInstr::mop_iterator I = BBI->operands_begin(), - E = BBI->operands_end(); I != E; ++I) { - if (I->isReg() && Register::isVirtualRegister(I->getReg())) { - if (I->isDef()) - Defs.insert(I->getReg()); - else if (I->isKill()) - Kills.insert(I->getReg()); + for (const MachineOperand &Op : BBI->operands()) { + if (Op.isReg() && Register::isVirtualRegister(Op.getReg())) { + if (Op.isDef()) + Defs.insert(Op.getReg()); + else if (Op.isKill()) + Kills.insert(Op.getReg()); } } } diff --git a/lib/CodeGen/MachineRegisterInfo.cpp b/lib/CodeGen/MachineRegisterInfo.cpp index b789f9d5670..d7444ece6f6 100644 --- a/lib/CodeGen/MachineRegisterInfo.cpp +++ b/lib/CodeGen/MachineRegisterInfo.cpp @@ -531,13 +531,10 @@ bool MachineRegisterInfo::isConstantPhysReg(MCRegister PhysReg) const { /// deleted during LiveDebugVariables analysis. void MachineRegisterInfo::markUsesInDebugValueAsUndef(Register Reg) const { // Mark any DBG_VALUE that uses Reg as undef (but don't delete it.) - MachineRegisterInfo::use_instr_iterator nextI; - for (use_instr_iterator I = use_instr_begin(Reg), E = use_instr_end(); - I != E; I = nextI) { - nextI = std::next(I); // I is invalidated by the setReg - MachineInstr *UseMI = &*I; - if (UseMI->isDebugValue()) - UseMI->getDebugOperandForReg(Reg)->setReg(0U); + // We use make_early_inc_range because setReg invalidates the iterator. + for (MachineInstr &UseMI : llvm::make_early_inc_range(use_instructions(Reg))) { + if (UseMI.isDebugValue()) + UseMI.getDebugOperandForReg(Reg)->setReg(0U); } } diff --git a/lib/CodeGen/RDFLiveness.cpp b/lib/CodeGen/RDFLiveness.cpp index 9a920ebad94..0580a327777 100644 --- a/lib/CodeGen/RDFLiveness.cpp +++ b/lib/CodeGen/RDFLiveness.cpp @@ -238,8 +238,8 @@ NodeList Liveness::getAllReachingDefs(RegisterRef RefRR, [this](auto A, auto B) { return MDT.properlyDominates(A, B); }); std::vector TmpInst; - for (auto I = TmpBB.rbegin(), E = TmpBB.rend(); I != E; ++I) { - auto &Bucket = Blocks[*I]; + for (MachineBasicBlock *MBB : llvm::reverse(TmpBB)) { + auto &Bucket = Blocks[MBB]; TmpInst.insert(TmpInst.end(), Bucket.rbegin(), Bucket.rend()); } @@ -931,13 +931,12 @@ void Liveness::resetKills(MachineBasicBlock *B) { for (auto SI : B->successors()) CopyLiveIns(SI, Live); - for (auto I = B->rbegin(), E = B->rend(); I != E; ++I) { - MachineInstr *MI = &*I; - if (MI->isDebugInstr()) + for (MachineInstr &MI : llvm::reverse(*B)) { + if (MI.isDebugInstr()) continue; - MI->clearKillInfo(); - for (auto &Op : MI->operands()) { + MI.clearKillInfo(); + for (auto &Op : MI.operands()) { // An implicit def of a super-register may not necessarily start a // live range of it, since an implicit use could be used to keep parts // of it live. Instead of analyzing the implicit operands, ignore @@ -950,7 +949,7 @@ void Liveness::resetKills(MachineBasicBlock *B) { for (MCSubRegIterator SR(R, &TRI, true); SR.isValid(); ++SR) Live.reset(*SR); } - for (auto &Op : MI->operands()) { + for (auto &Op : MI.operands()) { if (!Op.isReg() || !Op.isUse() || Op.isUndef()) continue; Register R = Op.getReg(); diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp index 4cbf8a83e8c..c78d74585cb 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp @@ -896,12 +896,10 @@ static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { LLVM_DUMP_METHOD void SelectionDAG::dump() const { dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n"; - for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); - I != E; ++I) { - const SDNode *N = &*I; - if (!N->hasOneUse() && N != getRoot().getNode() && - (!shouldPrintInline(*N, this) || N->use_empty())) - DumpNodes(N, 2, this); + for (const SDNode &N : allnodes()) { + if (!N.hasOneUse() && &N != getRoot().getNode() && + (!shouldPrintInline(N, this) || N.use_empty())) + DumpNodes(&N, 2, this); } if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); diff --git a/lib/CodeGen/SplitKit.cpp b/lib/CodeGen/SplitKit.cpp index ced8de4c25a..22cd63e3215 100644 --- a/lib/CodeGen/SplitKit.cpp +++ b/lib/CodeGen/SplitKit.cpp @@ -94,10 +94,10 @@ InsertPointAnalysis::computeLastInsertPoint(const LiveInterval &CurLI, // instructions in the block. if (ExceptionalSuccessors.empty()) return LIP.first; - for (auto I = MBB.rbegin(), E = MBB.rend(); I != E; ++I) { - if ((EHPadSuccessor && I->isCall()) || - I->getOpcode() == TargetOpcode::INLINEASM_BR) { - LIP.second = LIS.getInstructionIndex(*I); + for (const MachineInstr &MI : llvm::reverse(MBB)) { + if ((EHPadSuccessor && MI.isCall()) || + MI.getOpcode() == TargetOpcode::INLINEASM_BR) { + LIP.second = LIS.getInstructionIndex(MI); break; } } @@ -810,8 +810,8 @@ void SplitEditor::removeBackCopies(SmallVectorImpl &Copies) { RegAssignMap::iterator AssignI; AssignI.setMap(RegAssign); - for (unsigned i = 0, e = Copies.size(); i != e; ++i) { - SlotIndex Def = Copies[i]->def; + for (const VNInfo *C : Copies) { + SlotIndex Def = C->def; MachineInstr *MI = LIS.getInstructionFromIndex(Def); assert(MI && "No instruction for back-copy"); diff --git a/lib/CodeGen/UnreachableBlockElim.cpp b/lib/CodeGen/UnreachableBlockElim.cpp index f5dc589a98c..c9a19948ff2 100644 --- a/lib/CodeGen/UnreachableBlockElim.cpp +++ b/lib/CodeGen/UnreachableBlockElim.cpp @@ -114,25 +114,23 @@ bool UnreachableMachineBlockElim::runOnMachineFunction(MachineFunction &F) { // Loop over all dead blocks, remembering them and deleting all instructions // in them. std::vector DeadBlocks; - for (MachineFunction::iterator I = F.begin(), E = F.end(); I != E; ++I) { - MachineBasicBlock *BB = &*I; - + for (MachineBasicBlock &BB : F) { // Test for deadness. - if (!Reachable.count(BB)) { - DeadBlocks.push_back(BB); + if (!Reachable.count(&BB)) { + DeadBlocks.push_back(&BB); // Update dominator and loop info. - if (MLI) MLI->removeBlock(BB); - if (MDT && MDT->getNode(BB)) MDT->eraseNode(BB); + if (MLI) MLI->removeBlock(&BB); + if (MDT && MDT->getNode(&BB)) MDT->eraseNode(&BB); - while (BB->succ_begin() != BB->succ_end()) { - MachineBasicBlock* succ = *BB->succ_begin(); + while (BB.succ_begin() != BB.succ_end()) { + MachineBasicBlock* succ = *BB.succ_begin(); MachineBasicBlock::iterator start = succ->begin(); while (start != succ->end() && start->isPHI()) { for (unsigned i = start->getNumOperands() - 1; i >= 2; i-=2) if (start->getOperand(i).isMBB() && - start->getOperand(i).getMBB() == BB) { + start->getOperand(i).getMBB() == &BB) { start->RemoveOperand(i); start->RemoveOperand(i-1); } @@ -140,7 +138,7 @@ bool UnreachableMachineBlockElim::runOnMachineFunction(MachineFunction &F) { start++; } - BB->removeSuccessor(BB->succ_begin()); + BB.removeSuccessor(BB.succ_begin()); } } }