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Teach the ARM load-store optimizer to deal with dbg_value instructions.
llvm-svn: 105427
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@ -517,8 +517,11 @@ bool ARMLoadStoreOpt::MergeBaseUpdateLSMultiple(MachineBasicBlock &MBB,
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}
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// Try merging with the previous instruction.
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if (MBBI != MBB.begin()) {
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MachineBasicBlock::iterator BeginMBBI = MBB.begin();
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if (MBBI != BeginMBBI) {
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MachineBasicBlock::iterator PrevMBBI = prior(MBBI);
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while (PrevMBBI != BeginMBBI && PrevMBBI->isDebugValue())
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--PrevMBBI;
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if (isAM4) {
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if (Mode == ARM_AM::ia &&
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isMatchingDecrement(PrevMBBI, Base, Bytes, 0, Pred, PredReg)) {
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@ -541,8 +544,11 @@ bool ARMLoadStoreOpt::MergeBaseUpdateLSMultiple(MachineBasicBlock &MBB,
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}
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// Try merging with the next instruction.
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if (!DoMerge && MBBI != MBB.end()) {
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MachineBasicBlock::iterator EndMBBI = MBB.end();
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if (!DoMerge && MBBI != EndMBBI) {
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MachineBasicBlock::iterator NextMBBI = llvm::next(MBBI);
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while (NextMBBI != EndMBBI && NextMBBI->isDebugValue())
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++NextMBBI;
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if (isAM4) {
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if ((Mode == ARM_AM::ia || Mode == ARM_AM::ib) &&
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isMatchingIncrement(NextMBBI, Base, Bytes, 0, Pred, PredReg)) {
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@ -669,8 +675,11 @@ bool ARMLoadStoreOpt::MergeBaseUpdateLoadStore(MachineBasicBlock &MBB,
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unsigned Limit = isAM5 ? 0 : (isAM2 ? 0x1000 : 0x100);
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// Try merging with the previous instruction.
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if (MBBI != MBB.begin()) {
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MachineBasicBlock::iterator BeginMBBI = MBB.begin();
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if (MBBI != BeginMBBI) {
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MachineBasicBlock::iterator PrevMBBI = prior(MBBI);
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while (PrevMBBI != BeginMBBI && PrevMBBI->isDebugValue())
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--PrevMBBI;
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if (isMatchingDecrement(PrevMBBI, Base, Bytes, Limit, Pred, PredReg)) {
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DoMerge = true;
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AddSub = ARM_AM::sub;
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@ -685,8 +694,11 @@ bool ARMLoadStoreOpt::MergeBaseUpdateLoadStore(MachineBasicBlock &MBB,
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}
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// Try merging with the next instruction.
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if (!DoMerge && MBBI != MBB.end()) {
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MachineBasicBlock::iterator EndMBBI = MBB.begin();
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if (!DoMerge && MBBI != EndMBBI) {
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MachineBasicBlock::iterator NextMBBI = llvm::next(MBBI);
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while (NextMBBI != EndMBBI && NextMBBI->isDebugValue())
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++NextMBBI;
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if (!isAM5 &&
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isMatchingDecrement(NextMBBI, Base, Bytes, Limit, Pred, PredReg)) {
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DoMerge = true;
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