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[MCJIT] Make sure we test ARM BR24 relocations with both internal and external
symbols. Previously we have only been testing these relocations with external symbols. <rdar://problem/18308413> llvm-svn: 217635
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@ -17,8 +17,8 @@ insn2:
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nextPC:
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nextPC:
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add r1, r0, r0
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add r1, r0, r0
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# Check stub generation by referencing a common symbol, 'baz'. Check both the
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# Check stub generation for external symbols by referencing a common symbol, 'baz'.
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# Content of the stub, and the reference to the stub.
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# Check both the content of the stub, and the reference to the stub.
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# Stub should contain '0xe51ff004' (ldr pc, [pc, #-4]), followed by the target.
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# Stub should contain '0xe51ff004' (ldr pc, [pc, #-4]), followed by the target.
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#
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#
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# rtdyld-check: *{4}(stub_addr(foo.o, __text, baz)) = 0xe51ff004
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# rtdyld-check: *{4}(stub_addr(foo.o, __text, baz)) = 0xe51ff004
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@ -27,6 +27,11 @@ nextPC:
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# rtdyld-check: decode_operand(insn3, 0) = stub_addr(foo.o, __text, baz) - (insn3 + 8)
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# rtdyld-check: decode_operand(insn3, 0) = stub_addr(foo.o, __text, baz) - (insn3 + 8)
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insn3:
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insn3:
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bl baz
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bl baz
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# Check stub generation for internal symbols by referencing 'bar'.
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# rtdyld-check: *{4}(stub_addr(foo.o, __text, bar) + 4) = bar
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insn4:
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bl bar
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bx lr
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bx lr
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# Add 'aaa' to the common symbols to make sure 'baz' isn't at the start of the
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# Add 'aaa' to the common symbols to make sure 'baz' isn't at the start of the
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