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[ARM][MVE] Tail predicate VMAX,VMAXA,VMIN,VMINA
Add the MVE min and max instructions to our tail predication whitelist. Differential Revision: https://reviews.llvm.org/D72502
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@ -1138,6 +1138,7 @@ class MVE_VMINMAX<string iname, string suffix, bit U, bits<2> size,
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let Inst{8} = 0b0;
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let Inst{6} = 0b1;
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let Inst{4} = bit_4;
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let validForTailPredication = 1;
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}
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multiclass MVE_VMINMAX_m<string iname, bit bit_4, MVEVectorVTInfo VTI,
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@ -2298,6 +2299,7 @@ class MVE_VMINMAXA<string iname, string suffix, bits<2> size,
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let Inst{4} = 0b0;
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let Inst{3-1} = Qm{2-0};
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let Inst{0} = 0b1;
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let validForTailPredication = 1;
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}
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def MVE_VMAXAs8 : MVE_VMINMAXA<"vmaxa", "s8", 0b00, 0b0>;
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@ -149,6 +149,24 @@ TEST(MachineInstrValidTailPredication, IsCorrect) {
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case MVE_VFMA_qr_Sf32:
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case MVE_VFMA_qr_f16:
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case MVE_VFMA_qr_f32:
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case MVE_VMAXAs16:
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case MVE_VMAXAs32:
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case MVE_VMAXAs8:
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case MVE_VMAXs16:
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case MVE_VMAXs32:
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case MVE_VMAXs8:
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case MVE_VMAXu16:
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case MVE_VMAXu32:
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case MVE_VMAXu8:
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case MVE_VMINAs16:
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case MVE_VMINAs32:
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case MVE_VMINAs8:
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case MVE_VMINs16:
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case MVE_VMINs32:
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case MVE_VMINs8:
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case MVE_VMINu16:
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case MVE_VMINu32:
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case MVE_VMINu8:
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case MVE_VMLAS_qr_s16:
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case MVE_VMLAS_qr_s32:
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case MVE_VMLAS_qr_s8:
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