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[RegAllocGreedy]: Allow recoloring of done register if it's non-tied
Summary: If we have a non-allocated register, we allow us to try recoloring of an already allocated and "Done" register, even if they are of the same register class, if the non-allocated register has at least one tied def and the allocated one has none. It should be easier to recolor the non-tied register than the tied one, so it might be an improvement even if they use the same regclasses. Reviewers: qcolombet Reviewed By: qcolombet Subscribers: llvm-commits, MatzeB Differential Revision: https://reviews.llvm.org/D38309 llvm-svn: 314388
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@ -2054,6 +2054,15 @@ unsigned RAGreedy::trySplit(LiveInterval &VirtReg, AllocationOrder &Order,
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// Last Chance Recoloring
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//===----------------------------------------------------------------------===//
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/// Return true if \p reg has any tied def operand.
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static bool hasTiedDef(MachineRegisterInfo *MRI, unsigned reg) {
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for (const MachineOperand &MO : MRI->def_operands(reg))
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if (MO.isTied())
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return true;
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return false;
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}
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/// mayRecolorAllInterferences - Check if the virtual registers that
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/// interfere with \p VirtReg on \p PhysReg (or one of its aliases) may be
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/// recolored to free \p PhysReg.
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@ -2082,8 +2091,11 @@ RAGreedy::mayRecolorAllInterferences(unsigned PhysReg, LiveInterval &VirtReg,
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LiveInterval *Intf = Q.interferingVRegs()[i - 1];
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// If Intf is done and sit on the same register class as VirtReg,
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// it would not be recolorable as it is in the same state as VirtReg.
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if ((getStage(*Intf) == RS_Done &&
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MRI->getRegClass(Intf->reg) == CurRC) ||
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// However, if VirtReg has tied defs and Intf doesn't, then
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// there is still a point in examining if it can be recolorable.
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if (((getStage(*Intf) == RS_Done &&
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MRI->getRegClass(Intf->reg) == CurRC) &&
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!(hasTiedDef(MRI, VirtReg.reg) && !hasTiedDef(MRI, Intf->reg))) ||
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FixedRegisters.count(Intf->reg)) {
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DEBUG(dbgs() << "Early abort: the interference is not recolorable.\n");
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return false;
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