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Attempt to fix PR11607 by shuffling around which class defines which methods.
llvm-svn: 146897
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@ -646,7 +646,7 @@ public:
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virtual int getOperandLatency(const InstrItineraryData *ItinData,
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SDNode *DefNode, unsigned DefIdx,
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SDNode *UseNode, unsigned UseIdx) const;
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SDNode *UseNode, unsigned UseIdx) const = 0;
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/// getOutputLatency - Compute and return the output dependency latency of a
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/// a given pair of defs which both target the same register. This is usually
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@ -665,7 +665,7 @@ public:
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unsigned *PredCost = 0) const;
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virtual int getInstrLatency(const InstrItineraryData *ItinData,
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SDNode *Node) const;
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SDNode *Node) const = 0;
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/// isHighLatencyDef - Return true if this opcode has high latency to its
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/// result.
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@ -839,6 +839,11 @@ public:
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virtual bool isSchedulingBoundary(const MachineInstr *MI,
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const MachineBasicBlock *MBB,
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const MachineFunction &MF) const;
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virtual int getOperandLatency(const InstrItineraryData *ItinData,
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SDNode *DefNode, unsigned DefIdx,
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SDNode *UseNode, unsigned UseIdx) const;
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virtual int getInstrLatency(const InstrItineraryData *ItinData,
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SDNode *Node) const;
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bool usePreRAHazardRecognizer() const;
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@ -513,9 +513,9 @@ CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II,
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}
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int
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TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,
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SDNode *DefNode, unsigned DefIdx,
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SDNode *UseNode, unsigned UseIdx) const {
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TargetInstrInfoImpl::getOperandLatency(const InstrItineraryData *ItinData,
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SDNode *DefNode, unsigned DefIdx,
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SDNode *UseNode, unsigned UseIdx) const {
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if (!ItinData || ItinData->isEmpty())
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return -1;
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@ -529,8 +529,8 @@ TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,
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return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx);
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}
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int TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
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SDNode *N) const {
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int TargetInstrInfoImpl::getInstrLatency(const InstrItineraryData *ItinData,
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SDNode *N) const {
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if (!ItinData || ItinData->isEmpty())
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return 1;
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