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For PR1370:
Rearrange some tests so that if PowerPC is not being built we don't try to run PowerPC specific tests. llvm-svn: 36587
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@ -1,6 +1,3 @@
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; RUN: llvm-as < %s | llc -march=x86 | grep {shrl.*31}
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; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \
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; RUN: grep {srwi r3, r3, 31}
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; RUN: llvm-as < %s | llc -march=arm | grep {mov r0, r0, lsr #31}
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; RUN: llvm-as < %s | llc -march=thumb | grep {lsr r0, r0, #31}
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@ -1,5 +1,3 @@
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | grep test:
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | not grep vperm
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; RUN: llvm-upgrade < %s | llvm-as | llc
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void %test(<4 x float> *%tmp2.i) {
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10
test/CodeGen/PowerPC/ispositive.ll
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10
test/CodeGen/PowerPC/ispositive.ll
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@ -0,0 +1,10 @@
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; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \
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; RUN: grep {srwi r3, r3, 31}
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define i32 @test1(i32 %X) {
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entry:
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icmp slt i32 %X, 0 ; <i1>:0 [#uses=1]
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zext i1 %0 to i32 ; <i32>:1 [#uses=1]
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ret i32 %1
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}
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16
test/CodeGen/PowerPC/vector-identity-shuffle.ll
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16
test/CodeGen/PowerPC/vector-identity-shuffle.ll
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@ -0,0 +1,16 @@
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | grep test:
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | not grep vperm
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void %test(<4 x float> *%tmp2.i) {
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%tmp2.i = load <4x float>* %tmp2.i
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%xFloat0.48 = extractelement <4 x float> %tmp2.i, uint 0 ; <float> [#uses=1]
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%inFloat0.49 = insertelement <4 x float> undef, float %xFloat0.48, uint 0 ; <<4 x float>> [#uses=1]
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%xFloat1.50 = extractelement <4 x float> %tmp2.i, uint 1 ; <float> [#uses=1]
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%inFloat1.52 = insertelement <4 x float> %inFloat0.49, float %xFloat1.50, uint 1 ; <<4 x float>> [#uses=1]
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%xFloat2.53 = extractelement <4 x float> %tmp2.i, uint 2 ; <float> [#uses=1]
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%inFloat2.55 = insertelement <4 x float> %inFloat1.52, float %xFloat2.53, uint 2 ; <<4 x float>> [#uses=1]
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%xFloat3.56 = extractelement <4 x float> %tmp2.i, uint 3 ; <float> [#uses=1]
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%inFloat3.58 = insertelement <4 x float> %inFloat2.55, float %xFloat3.56, uint 3 ; <<4 x float>> [#uses=4]
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store <4 x float> %inFloat3.58, <4x float>* %tmp2.i
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ret void
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}
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9
test/CodeGen/X86/ispositive.ll
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9
test/CodeGen/X86/ispositive.ll
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@ -0,0 +1,9 @@
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; RUN: llvm-as < %s | llc -march=x86 | grep {shrl.*31}
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define i32 @test1(i32 %X) {
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entry:
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icmp slt i32 %X, 0 ; <i1>:0 [#uses=1]
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zext i1 %0 to i32 ; <i32>:1 [#uses=1]
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ret i32 %1
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}
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