From 60850cdc6a7573bfb103181f648585dee3de2762 Mon Sep 17 00:00:00 2001 From: Krzysztof Parzyszek Date: Tue, 27 Jul 2021 17:18:10 -0500 Subject: [PATCH] [Hexagon] Fix resetting dead registers in DBG_VALUE_LISTs This fixes https://llvm.org/PR51229. --- lib/Target/Hexagon/HexagonHardwareLoops.cpp | 5 +- test/CodeGen/Hexagon/hwloop-dbg-register.mir | 102 +++++++++++++++++++ 2 files changed, 104 insertions(+), 3 deletions(-) create mode 100644 test/CodeGen/Hexagon/hwloop-dbg-register.mir diff --git a/lib/Target/Hexagon/HexagonHardwareLoops.cpp b/lib/Target/Hexagon/HexagonHardwareLoops.cpp index 7d5880de184..58f3cd55ee9 100644 --- a/lib/Target/Hexagon/HexagonHardwareLoops.cpp +++ b/lib/Target/Hexagon/HexagonHardwareLoops.cpp @@ -1098,12 +1098,11 @@ void HexagonHardwareLoops::removeIfDead(MachineInstr *MI) { for (MachineRegisterInfo::use_iterator I = MRI->use_begin(Reg), E = MRI->use_end(); I != E; I = nextI) { nextI = std::next(I); // I is invalidated by the setReg - MachineOperand &Use = *I; MachineInstr *UseMI = I->getParent(); if (UseMI == MI) continue; - if (Use.isDebug()) - UseMI->getOperand(0).setReg(0U); + if (I->isDebug()) + I->setReg(0U); } } diff --git a/test/CodeGen/Hexagon/hwloop-dbg-register.mir b/test/CodeGen/Hexagon/hwloop-dbg-register.mir new file mode 100644 index 00000000000..2f264580b7c --- /dev/null +++ b/test/CodeGen/Hexagon/hwloop-dbg-register.mir @@ -0,0 +1,102 @@ +# RUN: llc -march=hexagon -run-pass hwloops -o - %s | FileCheck %s + +# This used to crash with `Assertion `isReg() && "This is not a register operand!"` +# CHECK: J2_loop0r + +--- | + target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048" + target triple = "hexagon" + + %s.0 = type { i32 } + + @g0 = external dso_local local_unnamed_addr global %s.0*, align 4, !dbg !0 + + define dso_local void @f0() local_unnamed_addr #0 !dbg !13 { + b0: + %v0 = sext i16 undef to i32 + br i1 undef, label %b2, label %b1 + + b1: ; preds = %b1, %b0 + %v1 = phi i32 [ %v2, %b1 ], [ undef, %b0 ] + %v2 = add nsw i32 %v1, -8 + %v3 = add nsw i32 %v2, %v0 + call void @llvm.dbg.value(metadata i32 %v3, metadata !19, metadata !DIExpression()), !dbg !24 + %v4 = load %s.0*, %s.0** @g0, align 4 + %v5 = getelementptr inbounds %s.0, %s.0* %v4, i32 %v3, i32 0 + store i32 undef, i32* %v5, align 4 + %v6 = icmp eq i32 %v2, 0 + br i1 %v6, label %b2, label %b1 + + b2: ; preds = %b1, %b0 + ret void + } + + declare void @llvm.dbg.value(metadata, metadata, metadata) #1 + + attributes #0 = { "target-features"="+v66,-long-calls" } + attributes #1 = { nofree nosync nounwind readnone speculatable willreturn } + + !llvm.dbg.cu = !{!2} + !llvm.module.flags = !{!11, !12} + + !0 = !DIGlobalVariableExpression(var: !1, expr: !DIExpression()) + !1 = distinct !DIGlobalVariable(name: "g0", scope: !2, file: !3, line: 3, type: !6, isLocal: false, isDefinition: true) + !2 = distinct !DICompileUnit(language: DW_LANG_C99, file: !3, producer: "clang version 13.0.0 (https://github.com/llvm/llvm-project 93664503be6b3f47269cf617f8c46b6ce95f8076)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !4, globals: !5, splitDebugInlining: false, nameTableKind: None) + !3 = !DIFile(filename: "dev.i", directory: "/test") + !4 = !{} + !5 = !{!0} + !6 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !7, size: 32) + !7 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "s.0", file: !3, line: 1, size: 32, elements: !8) + !8 = !{!9} + !9 = !DIDerivedType(tag: DW_TAG_member, name: "m", scope: !7, file: !3, line: 2, baseType: !10, size: 32) + !10 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed) + !11 = !{i32 2, !"Debug Info Version", i32 3} + !12 = !{i32 7, !"frame-pointer", i32 2} + !13 = distinct !DISubprogram(name: "f0", scope: !3, file: !3, line: 9, type: !14, scopeLine: 9, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !2, retainedNodes: !17) + !14 = !DISubroutineType(types: !15) + !15 = !{!10, !16} + !16 = !DIBasicType(name: "unsigned short", size: 16, encoding: DW_ATE_unsigned) + !17 = !{!18} + !18 = !DILocalVariable(name: "x", arg: 1, scope: !13, file: !3, line: 9, type: !16) + !19 = !DILocalVariable(name: "y", arg: 1, scope: !20, file: !3, line: 6, type: !10) + !20 = distinct !DISubprogram(name: "f1", scope: !3, file: !3, line: 6, type: !21, scopeLine: 6, flags: DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !2, retainedNodes: !23) + !21 = !DISubroutineType(types: !22) + !22 = !{!6, !10} + !23 = !{!19} + !24 = !DILocation(line: 0, scope: !20, inlinedAt: !25) + !25 = distinct !DILocation(line: 11, column: 5, scope: !13) + +... + +--- +name: f0 +tracksRegLiveness: true +body: | + bb.0.b0: + successors: %bb.2(0x40000000), %bb.3(0x40000000); %bb.2(50.00%), %bb.3(50.00%) + + %6:predregs = IMPLICIT_DEF + J2_jumpt %6:predregs, %bb.2, implicit-def $pc + + bb.3: + successors: %bb.1(0x80000000); %bb.1(100.00%) + + %5:intregs = IMPLICIT_DEF + %4:intregs = A2_tfrsi 0 + + bb.1.b1: + successors: %bb.2(0x04000000), %bb.1(0x7c000000); %bb.2(3.12%), %bb.1(96.88%) + + %0:intregs = PHI %4:intregs, %bb.3, %3:intregs, %bb.1 + %1:intregs = PHI %5:intregs, %bb.3, %2:intregs, %bb.1 + %2:intregs = nsw A2_addi %1:intregs, -8 + DBG_VALUE_LIST !19, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus, DW_OP_stack_value), %2:intregs, 0, debug-location !24 + %3:intregs = A2_addi %0:intregs, -32 + %7:predregs = C2_cmpeqi %2:intregs, 0 + J2_jumpf %7:predregs, %bb.1, implicit-def dead $pc + J2_jump %bb.2, implicit-def dead $pc + + bb.2.b2: + PS_jmpret $r31, implicit-def dead $pc +... +