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Legalizer: Reword comment again, per Duncan's suggestion.
llvm-svn: 173625
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@ -2098,9 +2098,8 @@ void DAGTypeLegalizer::ExpandIntRes_Shift(SDNode *N,
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EVT VT = LHSL.getValueType();
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// If the shift amount operand is coming from a vector legalization it may
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// have an illegal type. Fix that first by casting the operand. Otherwise
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// the new SHL_PARTS operation would need further legalization, and the
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// legalizer assumes that illegal SHL_PARTS never occur.
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// have an illegal type. Fix that first by casting the operand, otherwise
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// the new SHL_PARTS operation would need further legalization.
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SDValue ShiftOp = N->getOperand(1);
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MVT ShiftTy = TLI.getShiftAmountTy(VT);
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assert(ShiftTy.getSizeInBits() >= Log2_32_Ceil(VT.getSizeInBits()) &&
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